# Simulating test benchs

You can add a test bench to your circuit to test it, but you have to consider the following restrictions due to the simulation architecture.

## Simulation must be driven by Logisim

You cannot add event generating elements to your test bench, for example, you cannot add a clock generator process. Your test bench must take an external clock from Logisim as input.

## Don't use time based conditions

The time representation does not exist in Logisim, no you cannot have event based on time, for example wait for 5 ns. If you want to make asynchronous verification, you must add a sysclk who has at least twice the frequency of the mainclk. This way, you will be able to check the signals not only on the main clock rising edges but at any time you need.

Next: User's Guide .