PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

API Reference
AUTONOMOUS ANALOG (Autonomous Analog Block)
PDL API Reference

## General Description

This driver provides API functions to configure the Autonomous Analog.

The Autonomous Analog can sense a voltage or current, convert it to digital code, post process conversion data, and thus make the first-level decisions as close to the sensor as possible.

It is a low power reconfigurable mixed signal sense, condition, and respond system, which can be fully functional and autonomous in all power modes except Hibernate (see Power Modes chapter for the device).

The Autonomous Analog is entirely controlled and determined by a Finite-State Machine sequencer, (see AC (Autonomous Controller) for more details) which works of a State Transition Table (see cy_stc_autanalog_stt_t for more details), to transition appropriately through various pre-defined states, based on the Timer and/or Events.

The following diagram shows the subsystems of the Autonomous Analog. See the device datasheet for the exact location of pins.

# Glossary

- AC - Autonomous Controller, the state machine engine for the Autonomous Analog
- API - Application Programming Interface
- EOS - End Of Scan
- FIR - Finite Impulse Response digital filter
- FSM - Finite State Machine
- GPIO - General Purpose Input/Output
- HS - High Speed operating mode of the Autonomous Analog
- LP - Low Power operating mode of the Autonomous Analog
- LPOSC - Local Low Power Oscillator
- LSB - Least Significant Bit
- LUT - Look Up Table
- MMIO - Memory Mapped Input/Output register
- MUX - Multiplexer
- MSB - Most Significant Bit
- OPAMP - Operational Amplifier
- PGA - Programmable Gain Amplifier
- PRB - Programmable Reference, defines reference level of the voltage
- SAR - Successive Approximation Register
- S/H - Sample and Hold mode
- SRSS - System Resource Subsystem
- STT - State Transition Table, the table of state machine states for the Autonomous Analog, essentially, the 'program' for the AC (for more details, see cy_stc_autanalog_stt_t)
- TIA - Trans-impedance Amplifier
- TRM - Technical Reference Manual
- TC - Timer/Counter, the sub-block of the AC
- VBGR - Temperature-independent, band-gap voltage reference, used for e.g. PRB
- VDDA - Supplies voltage for all analog peripherals and analog core regulators in the device
- Vref - Reference Voltage

# SRSS Clocks

The Autonomous Analog can use the following externally supplied clocks:

- SRSS peripheral clock Clk_HF9 in chip Active mode using Peri 0 Clock Group 2 8-bit divider in the clock chain,
  refer to the High Speed and Low Power operation chapter for AC

- SRSS low frequency clock CLK_LF 32kHz used for AC wake-up Timer,
  refer to the AC wake-up Timer configuration structure cy_stc_autanalog_timer_t

  Note
    The maximum clock frequency for Autonomous Analog is 80MHz

# External Vref

The Autonomous Analog can use a locally generated Vref (refer to the PRB configuration structure cy_stc_autanalog_prb_cfg_t) or
a Vref supplied externally via the pin (refer to Reference Voltage chapter for SAR ADC)

Note
  The maximum level of the external Vref must not exceed the supply voltage for Autonomous Analog, which is 1.8V

# General Configuration Considerations

## Use ModusToolbox Device Configurator Tool to generate initialization code

The steps to generate initialization code using the ModusToolbox Device Configurator:

1. Launch the ModusToolbox Device Configurator.
2. Enable the Autonomous Analog under the Analog category.
3. Select the clock source for the Autonomous Analog according to the intended operating mode
   (refer to High Speed and Low Power operation chapter for AC) and set the clock divider value to achieve the desired clock rate.
4. Preserve the use of the appropriate pins for the required subsystems of the Autonomous Analog.
5. Enable the control of the AC Digital Outputs (if required).
6. Enable AC Output Triggers (if required).
7. Enable AC Input Triggers (if required).
8. Enable and configure AC (Autonomous Controller)
   Note
     The AC first sate must be set to "Wait Blocks Ready",
     (refer to configuration structure cy_en_autanalog_stt_ac_condition_t) when using subsystems other than AC.
9. Enable and configure other required subsystems:
   CTB (Continuous Time Block);
   PTComp (Programmable Threshold Comparator);
   CT DAC (Continuous Time Digital to Analog Converter);
   SAR ADC (Successive-Approximation Register Analog to Digital Converter);
   FIFO (The buffer block to store collected data);

# More Information

For more information on the Autonomous Analog, refer to the device Architecture Technical Reference Manual (TRM).

## API Reference
| AC (Autonomous Controller)
| This driver provides API functions to configure the Autonomous Controller (AC) subsystem within the Autonomous Analog.
| CTB (Continuous Time Block)
| This driver provides API functions to configure the CTB subsystem of the Autonomous Analog.
| PTComp (Programmable Threshold Comparator)
| This driver provides API functions to configure the PTComp subsystem of the Autonomous Analog.
| CT DAC (Continuous Time Digital to Analog Converter)
| This driver provides API functions to configure the CT DAC subsystem of the Autonomous Analog.
| SAR ADC (Successive-Approximation Register Analog to Digital Converter)
| This driver provides the API functions to configure the successive approximation register analog-to-digital converter (SAR ADC) subsystem of the Autonomous Analog.
| FIFO (The buffer block to store collected data)
| The FIFO subsystem is used to store the ADC data or the FIR filter results.
| General section of the API