PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Data Fields
vg_lite_tess_buffer_t Struct Reference

## Data Fields
vg_lite_uint32_t | physical_addr
vg_lite_uint8_t * | logical_addr
vg_lite_uint32_t | tessbuf_size
vg_lite_uint32_t | countbuf_size
vg_lite_uint32_t | tess_w_h
vg_lite_uint32_t | L1_phyaddr
vg_lite_uint32_t | L2_phyaddr
vg_lite_uint8_t * | L1_logical
vg_lite_uint8_t * | L2_logical
vg_lite_uint32_t | L1_size
vg_lite_uint32_t | L2_size
vg_lite_uint32_t | tess_stride

## Field Documentation

## ◆ physical_addr

vg_lite_uint32_t vg_lite_tess_buffer_t::physical_addr

## ◆ logical_addr

vg_lite_uint8_t* vg_lite_tess_buffer_t::logical_addr

Physical address for tessellation buffer.

## ◆ tessbuf_size

vg_lite_uint32_t vg_lite_tess_buffer_t::tessbuf_size

Logical address for tessellation buffer.

## ◆ countbuf_size

vg_lite_uint32_t vg_lite_tess_buffer_t::countbuf_size

Buffer size for tessellation buffer

## ◆ tess_w_h

vg_lite_uint32_t vg_lite_tess_buffer_t::tess_w_h

Buffer size for VG count buffer

## ◆ L1_phyaddr

vg_lite_uint32_t vg_lite_tess_buffer_t::L1_phyaddr

Combination of buffer width and height.

## ◆ L2_phyaddr

vg_lite_uint32_t vg_lite_tess_buffer_t::L2_phyaddr

L1 physical address.

## ◆ L1_logical

vg_lite_uint8_t* vg_lite_tess_buffer_t::L1_logical

L2 physical address.

## ◆ L2_logical

vg_lite_uint8_t* vg_lite_tess_buffer_t::L2_logical

L1 Logical address.

## ◆ L1_size

vg_lite_uint32_t vg_lite_tess_buffer_t::L1_size

L2 Logical address.

## ◆ L2_size

vg_lite_uint32_t vg_lite_tess_buffer_t::L2_size

L1 size for tessellation buffer

## ◆ tess_stride

vg_lite_uint32_t vg_lite_tess_buffer_t::tess_stride

L2 size for tessellation buffer