PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Data Structures
Data Structures
PDL API Reference » AXIDMAC (AXI Direct Memory Access Controller)

## General Description

## Data Structures
struct | cy_stc_axidmac_descriptor_t
| AXIDMAC descriptor structure type. More...
struct | cy_stc_axidmac_descriptor_config_t
| This structure is a configuration structure pre-initialized by user and passed as a parameter to the Cy_AXIDMAC_Descriptor_Init(). More...
struct | cy_stc_axidmac_channel_config_t
| This structure holds the initialization values for the AXIDMAC channel. More...

## Data Structure Documentation

## ◆ cy_stc_axidmac_descriptor_t

struct cy_stc_axidmac_descriptor_t

Data Fields
uint32_t | ctl | Descriptor control
uint32_t | src | Descriptor source holds the base address of source location
uint32_t | dst | Descriptor destination holds the base address of destination location
uint32_t | mSize | Descriptor memory copy size. Valid range is 0...16777216
uint32_t | xSize | Descriptor X loop size. Valid range is 0...65535
int32_t | xIncr | Descriptor X loop increment. Valid range is -32768...32767
uint32_t | ySize | Descriptor Y loop size. Valid range is 0...65535
int32_t | yIncr | Descriptor Y loop increment. Valid range is -32768...32767
uint32_t | nextPtr | Descriptor next pointer

## ◆ cy_stc_axidmac_descriptor_config_t

struct cy_stc_axidmac_descriptor_config_t

Data Fields
cy_en_axidmac_retrigger_t | retrigger | Specifies whether the AXIDMA controller should wait for the input trigger to be deactivated.
cy_en_axidmac_trigger_type_t | interruptType | Sets the event that triggers an interrupt. See cy_en_axidmac_trigger_type_t.
cy_en_axidmac_trigger_type_t | triggerOutType | Sets the event that triggers an output. See cy_en_axidmac_trigger_type_t.
cy_en_axidmac_channel_state_t | channelState | Specifies whether the channel is enabled or disabled on completion of descriptor see cy_en_axidmac_channel_state_t.
cy_en_axidmac_trigger_type_t | triggerInType | Sets what type of transfer is triggered. See cy_en_axidmac_trigger_type_t.
bool | dataPrefetch | Source data transfers are initiated as soon as the channel is enabled, the current descriptor pointer is NOT "0" and there is space available in the channel's data FIFO.
cy_en_axidmac_descriptor_type_t | descriptorType | The type of the descriptor. See cy_en_axidmac_descriptor_type_t.
void * | srcAddress | The source address of the transfer.
void * | dstAddress | The destination address of the transfer.
uint32_t | mCount | The number of bytes transfers in an M-loop.
int16_t | srcXincrement | The address increment of the source after each X-loop transfer. Valid range is -32768...32767.
int16_t | dstXincrement | The address increment of the destination after each X-loop transfer. Valid range is -32768...32767.
uint32_t | xCount | The number of transfers in an X-loop. Valid range (for all descriptors except scatter transfer) is 1...65536. For memory copy descriptors, the X count is a number of bytes (not a data transfer size). For scatter descriptors, the X count is a number of [address, data] pairs (two words each). Valid range is 1...32768.
int16_t | srcYincrement | The address increment of the source after each Y-loop transfer. Valid range is -32768...32767.
int16_t | dstYincrement | The address increment of the destination after each Y-loop transfer. Valid range is -32768...32767.
uint32_t | yCount | The number of X-loops in the Y-loop. Valid range is 1...65536.
cy_stc_axidmac_descriptor_t * | nextDescriptor | The next descriptor to chain after completion. A NULL value will signify no chaining.

## ◆ cy_stc_axidmac_channel_config_t

struct cy_stc_axidmac_channel_config_t

Data Fields
cy_stc_axidmac_descriptor_t * | descriptor | The AXIDMAC descriptor associated with the channel being initialized.
uint32_t | priority | This parameter specifies the channel's priority.
bool | enable | This parameter specifies if the channel is enabled after initializing.
bool | bufferable | This parameter specifies whether a write transaction can complete. without waiting for the destination to accept the write transaction data.