PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Macros
I2C Master Status
PDL API Reference » SCB (Serial Communication Block) » I2C (SCB) » Macros

## General Description

Macros to check current I2C master status returned by Cy_SCB_I2C_MasterGetStatus function.

Each I2C master status is encoded in a separate bit, therefore multiple bits may be set to indicate the current status.

## Macros
#define | CY_SCB_I2C_MASTER_BUSY (0x00010000UL)
| The master is busy executing operation started by Cy_SCB_I2C_MasterRead or Cy_SCB_I2C_MasterWrite.
#define | CY_SCB_I2C_MASTER_WR_IN_FIFO (0x00020000UL)
| All Write data has been loaded into the TX FIFO.
#define | CY_SCB_I2C_MASTER_ADDR_NAK (0x00100000UL)
| The slave NACKed the address.
#define | CY_SCB_I2C_MASTER_DATA_NAK (0x00200000UL)
| Write completed before all bytes were sent (last byte was NAKed)
#define | CY_SCB_I2C_MASTER_ARB_LOST (0x00400000UL)
| The master lost arbitration, the transaction was aborted.
#define | CY_SCB_I2C_MASTER_BUS_ERR (0x00800000UL)
| The master detected an erroneous start or stop, the transaction was aborted.
#define | CY_SCB_I2C_MASTER_ABORT_START (0x01000000UL)
| The master transaction was aborted and the slave transaction is on-going because the slave was addressed before the master generated a start.