PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Macros
Macros
PDL API Reference » SysClk (System Clock)

## General Description

## Macros
#define | CY_SYSCLK_DRV_VERSION_MAJOR 3
| Driver major version.
#define | CY_SYSCLK_DRV_VERSION_MINOR 150
| Driver minor version.
#define | CY_SYSCLK_ID CY_PDL_DRV_ID(0x12U)
| Sysclk driver identifier.
#define | CY_SYSCLK_ILO_FREQ (32768UL) /* Hz */
| ILO clock frequency.
#define | CY_SYSCLK_WCO_FREQ (32768UL) /* Hz */
| WCO clock frequency.
#define | CY_SYSCLK_PILO_FREQ (32768UL) /* Hz */
| PILO clock frequency.
#define | CY_SYSCLK_IMO_FREQ (8000000UL) /* Hz */
| IMO clock frequency.
#define | CY_SYSCLK_MFO_FREQ (2000000UL) /* Hz */
| MFO clock frequency.
#define | CY_SYSCLK_PILO_TRIM_STEP (5UL) /* Default PILO TRIM Step size */
| CY_SYSCLK_PILO_TRIM_STEP is the default PILO TRIM Step value.
#define | CY_SYSCLK_IHO_FREQ (50000000UL) /* Hz for PSVP */
| IHO clock frequency.
#define | CY_SYSCLK_TIMER_CLK_FREQ (1000000UL) /* Hz */
| Timer clock frequency.
#define | CY_SYSCLK_BYPASS_CONFIGURE_DELAY (2UL) /* micro seconds */
| FLL BYPASS configure Delay , As per SAS "When changing BYPASS_SEL, do not turn off the reference clock or CCO clock for ten cycles (whichever is slower)" Slower if IMO, so delay = (10 * 1/(IMO freq in Mhz)) = 1.25 micro seconds, approximated to 2 micro second.
#define | CY_SYSCLK_FLL_DISABLE_TIMEOUT (100UL) /* micro seconds */
| FLL Disable Timeout value.
#define | CY_SYSCLK_IS_CLKPATH_SOURCE_VALID(clkSrc)

## Macro Definition Documentation

## ◆ CY_SYSCLK_IS_CLKPATH_SOURCE_VALID

#define CY_SYSCLK_IS_CLKPATH_SOURCE_VALID | ( |  | clkSrc | ) |

Value:
(((clkSrc) == CY_SYSCLK_CLKPATH_IN_IHO) || \
((clkSrc) == CY_SYSCLK_CLKPATH_IN_EXT) || \
((clkSrc) == CY_SYSCLK_CLKPATH_IN_ECO) || \
((clkSrc) == CY_SYSCLK_CLKPATH_IN_IMO) || \
((clkSrc) == CY_SYSCLK_CLKPATH_IN_WCO) || \
((clkSrc) == CY_SYSCLK_CLKPATH_IN_PILO))
CY_SYSCLK_CLKPATH_IN_IMO
@ CY_SYSCLK_CLKPATH_IN_IMO
Select the IMO as the output of the path mux.
Definition: cy_sysclk.h:832
CY_SYSCLK_CLKPATH_IN_WCO
@ CY_SYSCLK_CLKPATH_IN_WCO
Select the WCO (17) as the output of the DSI mux and path mux.
Definition: cy_sysclk.h:842
CY_SYSCLK_CLKPATH_IN_ECO
@ CY_SYSCLK_CLKPATH_IN_ECO
Select the ECO as the output of the path mux.
Definition: cy_sysclk.h:831
CY_SYSCLK_CLKPATH_IN_IHO
@ CY_SYSCLK_CLKPATH_IN_IHO
Select the IHO as the output of the path mux.
Definition: cy_sysclk.h:829
CY_SYSCLK_CLKPATH_IN_PILO
@ CY_SYSCLK_CLKPATH_IN_PILO
Select the PILO (19) as the output of the DSI mux and path mux.
Definition: cy_sysclk.h:846
CY_SYSCLK_CLKPATH_IN_EXT
@ CY_SYSCLK_CLKPATH_IN_EXT
Select the EXT as the output of the path mux.
Definition: cy_sysclk.h:830