PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Enumerations
Enumerated Types
PDL API Reference » I3C (I3C)

## General Description

## Enumerations
enum | cy_en_i3c_status_t { CY_I3C_SUCCESS = 0U , CY_I3C_BAD_PARAM = (CY_I3C_ID| CY_PDL_STATUS_ERROR | 1U) , CY_I3C_CONTROLLER_NOT_READY = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 2U) , CY_I3C_CONTROLLER_MAX_DEVS_PRESENT = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 3U) , CY_I3C_CONTROLLER_BAD_I2C_DEVICE = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 4U) , CY_I3C_CONTROLLER_CCC_NOT_SUPPORTED =(CY_I3C_ID | CY_PDL_STATUS_ERROR | 5U) , CY_I3C_CONTROLLER_ERROR_CE0 = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 6U ) , CY_I3C_CONTROLLER_CRC_ERROR = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 7U ) , CY_I3C_CONTROLLER_PARITY_ERROR = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 8U ) , CY_I3C_CONTROLLER_FRAME_ERROR = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 9U ) , CY_I3C_CONTROLLER_BROADCAST_ADDR_NACK_ERROR = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 10U ) , CY_I3C_CONTROLLER_ADDR_NACK_ERROR = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 11U ) , CY_I3C_CONTROLLER_BUFFER_OVERFLOW_ERROR = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 12U ) , CY_I3C_CONTROLLER_XFER_ABORTED_ERROR = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 13U ) , CY_I3C_CONTROLLER_I2C_TGT_WDATA_NACK_ERROR = ( CY_I3C_ID | CY_PDL_STATUS_ERROR | 14U ) , CY_I3C_CONTROLLER_IBI_NACK = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 15U) , CY_I3C_CONTROLLER_MR_IBI_ACK = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 16U) , CY_I3C_CONTROLLER_SIR_IBI_ACK = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 17U) , CY_I3C_CONTROLLER_HOTJOIN_IBI_ACK = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 18U) , CY_I3C_CONTROLLER_FREE_ADDR_UNAVAIL = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 19U) , CY_I3C_NOT_HDR_CAP = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 20U) , CY_I3C_BAD_BUFFER_SIZE = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 21U) , CY_I3C_ADDR_MISMATCH = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 22U) , CY_I3C_ADDR_INVALID = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 23U) , CY_I3C_SIR_DISABLED = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 24U) , CY_I3C_CR_DISABLED = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 25U) , CY_I3C_IBI_NOT_ATTEMPTED = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 26U) , CY_I3C_NO_SECONDARY_CONTROLLER_DEVICES = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 27U) , CY_I3C_BAD_EVENT_REQ = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 28U) , CY_I3C_NOT_SECONDARY_CONTROLLER = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 29U) , CY_I3C_TIMEOUT = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 30U) , CY_I3C_CONTROLLER_PEC_ERROR = (CY_I3C_ID | CY_PDL_STATUS_ERROR | 31U) }
| I3C status codes. More...
enum | cy_en_i3c_mode_t { CY_I3C_TARGET = 0U , CY_I3C_SECONDARY_CONTROLLER = 1U , CY_I3C_CONTROLLER = 2U }
| I3C Operation Modes. More...
enum | cy_en_i3c_bus_mode_t { CY_I3C_BUS_PURE , CY_I3C_BUS_MIXED_FAST , CY_I3C_BUS_MIXED_SLOW , CY_I3C_BUS_MODE_NOT_APPLICABLE }
| I3C Bus Modes. More...
enum | cy_en_i3c_addr_slot_status_t { CY_I3C_ADDR_SLOT_FREE , CY_I3C_ADDR_SLOT_RSVD , CY_I3C_ADDR_SLOT_I2C_DEV , CY_I3C_ADDR_SLOT_I3C_DEV }
| I3C Address Slot Statuses. More...
enum | cy_en_i3c_ibi_type_t { CY_I3C_IBI_HOTJOIN , CY_I3C_IBI_SIR , CY_I3C_IBI_CONTROLLER_REQ }
| I3C IBI Types. More...
enum | cy_en_i3c_tid_t { CY_I3C_CONTROLLER_SDR_WRITE_TID = 1U , CY_I3C_CONTROLLER_SDR_READ_TID = 2U , CY_I3C_CONTROLLER_HDR_WRITE_TID = 3U , CY_I3C_CONTROLLER_HDR_READ_TID = 4U }
| I3C Transaction IDs for HDR and SDR commands. More...
enum | cy_en_i3c_data_speed_t { CY_I3C_SDR0 = 0U , CY_I3C_SDR1 = 1U , CY_I3C_SDR2 = 2U , CY_I3C_SDR3 = 3U , CY_I3C_SDR4 = 4U , CY_I3C_HDR_DDR = 6U }
| I3C Mode, SDR and HDR transfer speeds. More...
enum | cy_en_i2c_data_speed_t { CY_I3C_FMP_I2C = 0U , CY_I3C_FM_I2C = 1U }
| I2C Mode, SDR transfer speeds. More...
enum | cy_en_i3c_buffer_depth_t { CY_I3C_1_WORD_DEPTH = 0U , CY_I3C_4_WORD_DEPTH = 1U , CY_I3C_8_WORD_DEPTH = 2U , CY_I3C_16_WORD_DEPTH = 3U , CY_I3C_32_WORD_DEPTH = 4U , CY_I3C_64_WORD_DEPTH = 5U }
| I3C buffer depths. More...
enum | cy_en_i3c_target_reset_t { CY_I3C_NO_RESET = 0U , CY_I3C_PERIPHERAL_RESET = 1U , CY_I3C_CHIP_RESET = 2U }
| I3C Target Reset. More...
enum | cy_en_i3c_activity_states_t { ActivityState0 , ActivityState1 , ActivityState2 , ActivityState3 }
| I3C Activity states specified by ENTAS(x) CCC. More...

## Enumeration Type Documentation

## ◆ cy_en_i3c_status_t

enum cy_en_i3c_status_t

I3C status codes.

Enumerator
CY_I3C_SUCCESS | Operation completed successfully.
CY_I3C_BAD_PARAM | One or more of input parameters are invalid.
CY_I3C_CONTROLLER_NOT_READY | The controller is not ready to start a new transaction. Either the controller is still processing a previous transaction or in the controller-target mode, the target operation is in progress.
CY_I3C_CONTROLLER_MAX_DEVS_PRESENT | The controller failed to attach the target device to the bus as there already exists maximum number of devices on the bus.
CY_I3C_CONTROLLER_BAD_I2C_DEVICE | The controller rejected to attach an I2C device without 50ns Spike filter.
CY_I3C_CONTROLLER_CCC_NOT_SUPPORTED | Unsupported CCC command.
CY_I3C_CONTROLLER_ERROR_CE0 | SDR Controller Error Code CE0 for Illegally formatted CCC Response.
CY_I3C_CONTROLLER_CRC_ERROR | Error Type of the processed command received in Response Data Structure: CRC Error.
CY_I3C_CONTROLLER_PARITY_ERROR | Error Type of the processed command received in Response Data Structure: Parity Error.
CY_I3C_CONTROLLER_FRAME_ERROR | Error Type of the processed command received in Response Data Structure: Frame Error.
CY_I3C_CONTROLLER_BROADCAST_ADDR_NACK_ERROR | Error Type of the processed command received in Response Data Structure: Broadcast Address NACK Error.
CY_I3C_CONTROLLER_ADDR_NACK_ERROR | Error Type of the processed command received in Response Data Structure: Address NACK Error - Target NACKs for the dynamic address assignment during ENTDAA process.
CY_I3C_CONTROLLER_BUFFER_OVERFLOW_ERROR | Error Type of the processed command received in Response Data Structure: TX/RX Buffer Overflow Error - Only for HDR Transfers.
CY_I3C_CONTROLLER_XFER_ABORTED_ERROR | Error Type of the processed command received in Response Data Structure: Transfer Aborted Error.
CY_I3C_CONTROLLER_I2C_TGT_WDATA_NACK_ERROR | Error Type of the processed command received in Response Data Structure: I2C Target Write Data NACK Error.
CY_I3C_CONTROLLER_IBI_NACK | The controller NACKed the IBI.
CY_I3C_CONTROLLER_MR_IBI_ACK | The controller ACKed the Controllership Request IBI.
CY_I3C_CONTROLLER_SIR_IBI_ACK | The controller ACKed the Target Interrupt Request IBI.
CY_I3C_CONTROLLER_HOTJOIN_IBI_ACK | The controller ACKed the Hot-join IBI.
CY_I3C_CONTROLLER_FREE_ADDR_UNAVAIL | Free address unavailable.
CY_I3C_NOT_HDR_CAP | The device is not HDR capable.
CY_I3C_BAD_BUFFER_SIZE | The buffer size is greater than the FIFO size.
CY_I3C_ADDR_MISMATCH | The secondary controller responded with incorrect address to GETACCCR CCC.
CY_I3C_ADDR_INVALID | The device is not yet assigned a dynamic address.
CY_I3C_SIR_DISABLED | In Target mode of operation, the Controller has disabled TIR through DISEC.
CY_I3C_CR_DISABLED | In Target mode of operation, the Controller has disabled MR through DISEC.
CY_I3C_IBI_NOT_ATTEMPTED | The Target device failed to issue IBI.
CY_I3C_NO_SECONDARY_CONTROLLER_DEVICES | There are no secondary controller devices on the bus.
CY_I3C_BAD_EVENT_REQ | The target device requested generation of hot-join event generation.
CY_I3C_NOT_SECONDARY_CONTROLLER | The device is not a secondary controller.
CY_I3C_TIMEOUT | No response was received, connection timeout.
CY_I3C_CONTROLLER_PEC_ERROR | Error Type of the processed command received in Response Data Structure: PEC Error.

## ◆ cy_en_i3c_mode_t

enum cy_en_i3c_mode_t

I3C Operation Modes.

Note
  I3C supports only Primary Controller mode in PSE84A0. Secondary controller mode and Target mode are supported in PSE84B0.

Enumerator
CY_I3C_TARGET | Configures I3C for Target operation.
CY_I3C_SECONDARY_CONTROLLER | Configures I3C for Secondary Controller operation.
CY_I3C_CONTROLLER | Configures I3C for Main Controller-operation.

## ◆ cy_en_i3c_bus_mode_t

enum cy_en_i3c_bus_mode_t

I3C Bus Modes.

Enumerator
CY_I3C_BUS_PURE | Only I3C devices are connected to the bus. No limitation expected
CY_I3C_BUS_MIXED_FAST | I2C devices with 50ns spike filter are present on the bus. High SCL pulse has to stay below 50ns when transmitting I3C frames
CY_I3C_BUS_MIXED_SLOW | I2C devices without 50ns spike filter are present on the bus.
CY_I3C_BUS_MODE_NOT_APPLICABLE | Only for I3C Target configuration.

## ◆ cy_en_i3c_addr_slot_status_t

enum cy_en_i3c_addr_slot_status_t

I3C Address Slot Statuses.

Enumerator
CY_I3C_ADDR_SLOT_FREE | Address is free.
CY_I3C_ADDR_SLOT_RSVD | Address is reserved.
CY_I3C_ADDR_SLOT_I2C_DEV | Address is assigned to an I2C device.
CY_I3C_ADDR_SLOT_I3C_DEV | Address is assigned to an I3C device.

## ◆ cy_en_i3c_ibi_type_t

enum cy_en_i3c_ibi_type_t

I3C IBI Types.

Enumerator
CY_I3C_IBI_HOTJOIN | IBI Hot join Request.
CY_I3C_IBI_SIR | IBI Target Interrupt Request.
CY_I3C_IBI_CONTROLLER_REQ | IBI Controller ownership Request.

## ◆ cy_en_i3c_tid_t

enum cy_en_i3c_tid_t

I3C Transaction IDs for HDR and SDR commands.

Enumerator
CY_I3C_CONTROLLER_SDR_WRITE_TID | TID for SDR Write Transfer.
CY_I3C_CONTROLLER_SDR_READ_TID | TID for SDR Read Transfer.
CY_I3C_CONTROLLER_HDR_WRITE_TID | TID for HDR Write Transfer.
CY_I3C_CONTROLLER_HDR_READ_TID | TID for HDR Read Transfer.

## ◆ cy_en_i3c_data_speed_t

enum cy_en_i3c_data_speed_t

I3C Mode, SDR and HDR transfer speeds.

Enumerator
CY_I3C_SDR0 | I3C mode transfer speed - SDR0.
CY_I3C_SDR1 | I3C mode transfer speed - SDR1.
CY_I3C_SDR2 | I3C mode transfer speed - SDR2.
CY_I3C_SDR3 | I3C mode transfer speed - SDR3.
CY_I3C_SDR4 | I3C mode transfer speed - SDR4.
CY_I3C_HDR_DDR | I3C mode transfer speed - HDR-DDR.

## ◆ cy_en_i2c_data_speed_t

enum cy_en_i2c_data_speed_t

I2C Mode, SDR transfer speeds.

Enumerator
CY_I3C_FMP_I2C | I2C mode transfer speed - Fast Mode Plus.
CY_I3C_FM_I2C | I2C mode transfer speed - Fast Mode.

## ◆ cy_en_i3c_buffer_depth_t

enum cy_en_i3c_buffer_depth_t

I3C buffer depths.

Enumerator
CY_I3C_1_WORD_DEPTH | Buffer depth of 1 word.
CY_I3C_4_WORD_DEPTH | Buffer depth of 4 words.
CY_I3C_8_WORD_DEPTH | Buffer depth of 8 words.
CY_I3C_16_WORD_DEPTH | Buffer depth of 16 words.
CY_I3C_32_WORD_DEPTH | Buffer depth of 32 words.
CY_I3C_64_WORD_DEPTH | Buffer depth of 64 words.

## ◆ cy_en_i3c_target_reset_t

enum cy_en_i3c_target_reset_t

I3C Target Reset.

Enumerator
CY_I3C_NO_RESET | No Reset on Target Reset Pattern.
CY_I3C_PERIPHERAL_RESET | Reset the I3C Peripheral Only.
CY_I3C_CHIP_RESET | Reset the Whole Target.

## ◆ cy_en_i3c_activity_states_t

enum cy_en_i3c_activity_states_t

I3C Activity states specified by ENTAS(x) CCC.

Enumerator
ActivityState0 | Activity State 0.
ActivityState1 | Activity State 1.
ActivityState2 | Activity State 2.
ActivityState3 | Activity State 3.