PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Data Fields
GFXSS_GPU_MXGPU_Type Struct Reference

## Description

Platform IP standard configuration for GPU.

(GFXSS_GPU_MXGPU)

## Data Fields
__IOM uint32_t | CTL
__IM uint32_t | RESERVED [2]
__IM uint32_t | STATUS
__IOM uint32_t | INTR
__IOM uint32_t | INTR_SET
__IOM uint32_t | INTR_MASK
__IM uint32_t | INTR_MASKED

## Field Documentation

## ◆ CTL

__IOM uint32_t GFXSS_GPU_MXGPU_Type::CTL

0x00000000 IP control.

## ◆ RESERVED

__IM uint32_t GFXSS_GPU_MXGPU_Type::RESERVED[2]

## ◆ STATUS

__IM uint32_t GFXSS_GPU_MXGPU_Type::STATUS

0x0000000C IP status.

## ◆ INTR

__IOM uint32_t GFXSS_GPU_MXGPU_Type::INTR

0x00000010 Interrupt status bits.

## ◆ INTR_SET

__IOM uint32_t GFXSS_GPU_MXGPU_Type::INTR_SET

0x00000014 Interrupt set bits.

## ◆ INTR_MASK

__IOM uint32_t GFXSS_GPU_MXGPU_Type::INTR_MASK

0x00000018 Interrupt mask bits.

## ◆ INTR_MASKED

__IM uint32_t GFXSS_GPU_MXGPU_Type::INTR_MASKED

0x0000001C Interrupt masked bits.