PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Macros
PWM Alignment
PDL API Reference » TCPWM (Timer Counter PWM) » PWM (TCPWM) » Macros

## General Description

Sets the alignment of the PWM.

## Macros
#define | CY_TCPWM_PWM_LEFT_ALIGN (0U)
| PWM is left aligned, meaning it starts high.
#define | CY_TCPWM_PWM_RIGHT_ALIGN (1U)
| PWM is right aligned, meaning it starts low.
#define | CY_TCPWM_PWM_CENTER_ALIGN (2U)
| PWM is centered aligned, terminal count only occurs on underflow.
#define | CY_TCPWM_PWM_ASYMMETRIC_ALIGN (3U)
| PWM is asymmetrically aligned, terminal count occurs on overflow and underflow.
#define | CY_TCPWM_PWM_ASYMMETRIC_CC0_CC1_ALIGN (4U)
| PWM is asymmetrically aligned, line pulse period is equal to CC1-CC0.
#define | CY_TCPWM_PWM_CENTER_ASYMMETRIC_CC0_CC1_ALIGN (5U)
| PWM is asymmetrically aligned, TBD.