PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Data Fields
DW_CH_STRUCT_Type Struct Reference

## Description

DW channel structure (DW_CH_STRUCT)

## Data Fields
__IOM uint32_t | CH_CTL
__IM uint32_t | CH_STATUS
__IOM uint32_t | CH_IDX
__IOM uint32_t | CH_CURR_PTR
__IOM uint32_t | INTR
__IOM uint32_t | INTR_SET
__IOM uint32_t | INTR_MASK
__IM uint32_t | INTR_MASKED
__IOM uint32_t | SRAM_DATA0
__IOM uint32_t | SRAM_DATA1
__IOM uint32_t | TR_CMD
__IM uint32_t | RESERVED [5]

## Field Documentation

## ◆ CH_CTL

__IOM uint32_t DW_CH_STRUCT_Type::CH_CTL

0x00000000 Channel control

## ◆ CH_STATUS

__IM uint32_t DW_CH_STRUCT_Type::CH_STATUS

0x00000004 Channel status

## ◆ CH_IDX

__IOM uint32_t DW_CH_STRUCT_Type::CH_IDX

0x00000008 Channel current indices

## ◆ CH_CURR_PTR

__IOM uint32_t DW_CH_STRUCT_Type::CH_CURR_PTR

0x0000000C Channel current descriptor pointer

## ◆ INTR

__IOM uint32_t DW_CH_STRUCT_Type::INTR

0x00000010 Interrupt

## ◆ INTR_SET

__IOM uint32_t DW_CH_STRUCT_Type::INTR_SET

0x00000014 Interrupt set

## ◆ INTR_MASK

__IOM uint32_t DW_CH_STRUCT_Type::INTR_MASK

0x00000018 Interrupt mask

## ◆ INTR_MASKED

__IM uint32_t DW_CH_STRUCT_Type::INTR_MASKED

0x0000001C Interrupt masked

## ◆ SRAM_DATA0

__IOM uint32_t DW_CH_STRUCT_Type::SRAM_DATA0

0x00000020 SRAM data 0

## ◆ SRAM_DATA1

__IOM uint32_t DW_CH_STRUCT_Type::SRAM_DATA1

0x00000024 SRAM data 1

## ◆ TR_CMD

__IOM uint32_t DW_CH_STRUCT_Type::TR_CMD

0x00000028 Channel software trigger

## ◆ RESERVED

__IM uint32_t DW_CH_STRUCT_Type::RESERVED[5]