PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Data Fields
MXNNLITE_2_0_Type Struct Reference

## Description

MXNNLITE_2_0.

## Data Fields
__IM uint32_t | RESERVED
__IOM uint32_t | WEIGHTSTREAMERBASEADDR
__IOM uint32_t | WEIGHTSTREAMEROFFSET
__IOM uint32_t | WEIGHTSTREAMERKERNELCHANNELTIMESHEIGHTTIMESWIDTH
__IOM uint32_t | ACTIVATIONSTREAMERCHANNEL
__IOM uint32_t | ACTIVATIONSTREAMERBASEADDR
__IOM uint32_t | ACTIVATIONSTREAMEROFFSET
__IOM uint32_t | ACTIVATIONSTREAMERKERNELCHANNELTIMESWIDTH
__IOM uint32_t | ACTIVATIONSTREAMERKERNELHEIGHT
__IOM uint32_t | ACTIVATIONSTREAMERREPEATS
__IOM uint32_t | ACTIVATIONSTREAMERSTARTCOL
__IOM uint32_t | ACTIVATIONSTREAMERSTARTROW
__IOM uint32_t | ACTIVATIONSTREAMERCHANNELTIMESWIDTH
__IOM uint32_t | ACTIVATIONSTREAMERHEIGHT
__IOM uint32_t | ACTIVATIONSTREAMERPADDING
__IOM uint32_t | ACTIVATIONSTREAMERSPARSITYMAPBASEADDR
__IOM uint32_t | OUTSTREAMERBASEADDR
__IOM uint32_t | OUTSTREAMEROUTPUTOFFSET
__IOM uint32_t | OUTSTREAMERCLIPPING
__IOM uint32_t | INTERPOLATIONLUTDATA0
__IOM uint32_t | INTERPOLATIONLUTDATA1
__IOM uint32_t | BIASBASEADDR
__IOM uint32_t | SCALINGFACTORBASEADDR
__IOM uint32_t | NONZEROWEIGHTSPOINTER
__IOM uint32_t | INPUTRESCALINGFACTOR
__IOM uint32_t | OUTPUTCHANNELS
__IOM uint32_t | OUTPUTWIDTH
__IOM uint32_t | OUTPUTHEIGHT
__IOM uint32_t | STRIDE
__IOM uint32_t | NNLAYER_CTL
__IOM uint32_t | INTR
__IOM uint32_t | INTR_MASK
__IOM uint32_t | TRIG_MASK
__IOM uint32_t | CMD
__IOM uint32_t | INTR_SET
__IM uint32_t | INTR_MASKED
__IM uint32_t | STATUS

## Field Documentation

## ◆ RESERVED

__IM uint32_t MXNNLITE_2_0_Type::RESERVED

## ◆ WEIGHTSTREAMERBASEADDR

__IOM uint32_t MXNNLITE_2_0_Type::WEIGHTSTREAMERBASEADDR

0x00000004

## ◆ WEIGHTSTREAMEROFFSET

__IOM uint32_t MXNNLITE_2_0_Type::WEIGHTSTREAMEROFFSET

0x00000008

## ◆ WEIGHTSTREAMERKERNELCHANNELTIMESHEIGHTTIMESWIDTH

__IOM uint32_t MXNNLITE_2_0_Type::WEIGHTSTREAMERKERNELCHANNELTIMESHEIGHTTIMESWIDTH

0x0000000C

## ◆ ACTIVATIONSTREAMERCHANNEL

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERCHANNEL

0x00000010

## ◆ ACTIVATIONSTREAMERBASEADDR

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERBASEADDR

0x00000014

## ◆ ACTIVATIONSTREAMEROFFSET

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMEROFFSET

0x00000018

## ◆ ACTIVATIONSTREAMERKERNELCHANNELTIMESWIDTH

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERKERNELCHANNELTIMESWIDTH

0x0000001C

## ◆ ACTIVATIONSTREAMERKERNELHEIGHT

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERKERNELHEIGHT

0x00000020

## ◆ ACTIVATIONSTREAMERREPEATS

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERREPEATS

0x00000024

## ◆ ACTIVATIONSTREAMERSTARTCOL

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERSTARTCOL

0x00000028

## ◆ ACTIVATIONSTREAMERSTARTROW

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERSTARTROW

0x0000002C

## ◆ ACTIVATIONSTREAMERCHANNELTIMESWIDTH

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERCHANNELTIMESWIDTH

0x00000030

## ◆ ACTIVATIONSTREAMERHEIGHT

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERHEIGHT

0x00000034

## ◆ ACTIVATIONSTREAMERPADDING

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERPADDING

0x00000038

## ◆ ACTIVATIONSTREAMERSPARSITYMAPBASEADDR

__IOM uint32_t MXNNLITE_2_0_Type::ACTIVATIONSTREAMERSPARSITYMAPBASEADDR

0x0000003C

## ◆ OUTSTREAMERBASEADDR

__IOM uint32_t MXNNLITE_2_0_Type::OUTSTREAMERBASEADDR

0x00000040

## ◆ OUTSTREAMEROUTPUTOFFSET

__IOM uint32_t MXNNLITE_2_0_Type::OUTSTREAMEROUTPUTOFFSET

0x00000044

## ◆ OUTSTREAMERCLIPPING

__IOM uint32_t MXNNLITE_2_0_Type::OUTSTREAMERCLIPPING

0x00000048

## ◆ INTERPOLATIONLUTDATA0

__IOM uint32_t MXNNLITE_2_0_Type::INTERPOLATIONLUTDATA0

0x0000004C

## ◆ INTERPOLATIONLUTDATA1

__IOM uint32_t MXNNLITE_2_0_Type::INTERPOLATIONLUTDATA1

0x00000050

## ◆ BIASBASEADDR

__IOM uint32_t MXNNLITE_2_0_Type::BIASBASEADDR

0x00000054

## ◆ SCALINGFACTORBASEADDR

__IOM uint32_t MXNNLITE_2_0_Type::SCALINGFACTORBASEADDR

0x00000058

## ◆ NONZEROWEIGHTSPOINTER

__IOM uint32_t MXNNLITE_2_0_Type::NONZEROWEIGHTSPOINTER

0x0000005C Memory address, which stores the number of the non-zero weights

## ◆ INPUTRESCALINGFACTOR

__IOM uint32_t MXNNLITE_2_0_Type::INPUTRESCALINGFACTOR

0x00000060 Floating point value (IEEE-754 single precision) which scales the activation/weight input

## ◆ OUTPUTCHANNELS

__IOM uint32_t MXNNLITE_2_0_Type::OUTPUTCHANNELS

0x00000064 Unsigned number of output channels for depthwise operations

## ◆ OUTPUTWIDTH

__IOM uint32_t MXNNLITE_2_0_Type::OUTPUTWIDTH

0x00000068 Output width for one layer

## ◆ OUTPUTHEIGHT

__IOM uint32_t MXNNLITE_2_0_Type::OUTPUTHEIGHT

0x0000006C Output height for one layer

## ◆ STRIDE

__IOM uint32_t MXNNLITE_2_0_Type::STRIDE

0x00000070 Stride control register

## ◆ NNLAYER_CTL

__IOM uint32_t MXNNLITE_2_0_Type::NNLAYER_CTL

0x00000074 Configure layer pattern, activation functions, activation size, and weight size (only for DSP algorithms)

## ◆ INTR

__IOM uint32_t MXNNLITE_2_0_Type::INTR

0x00000078 Interrupt cause and clear register

## ◆ INTR_MASK

__IOM uint32_t MXNNLITE_2_0_Type::INTR_MASK

0x0000007C Interrupt mask register. A co-located interrupt cause bit will only cause an interrupt when its mask bit is 1

## ◆ TRIG_MASK

__IOM uint32_t MXNNLITE_2_0_Type::TRIG_MASK

0x00000080 Trigger mask register. Calculation done for one layer triggers DataWire when its mask bit is 1

## ◆ CMD

__IOM uint32_t MXNNLITE_2_0_Type::CMD

0x00000084 Command register

## ◆ INTR_SET

__IOM uint32_t MXNNLITE_2_0_Type::INTR_SET

0x00000088 Set INTR_XXX register by software for debug purpose

## ◆ INTR_MASKED

__IM uint32_t MXNNLITE_2_0_Type::INTR_MASKED

0x0000008C Virtual register for generating the interrupt signal to MCU. It is the logical AND of the INTR_XXX and INTR_MASK_XXX register

## ◆ STATUS

__IM uint32_t MXNNLITE_2_0_Type::STATUS

0x00000090 Status register