PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

MemorySPI (Memory Serial Peripheral Interface)
HAL API Reference » Implementation Specific

# Configurator-generated features limitations

List of SMIF personality items, which are currently not supported in MemorySPI HAL driver on non-PSE84 devices:

- XIP (eXecute In Place) mode
- Memory Mode Alignment Error interrupt
- RX Data FIFO Underflow interrupt
- TX Command FIFO Overflow
- TX Data FIFO Overflow interrupt
- RX FIFO Level Trigger interrupt
- TX FIFO Level Trigger interrupt
- RX DMA Trigger
- TX DMA Trigger

# Interface clock frequency

Starting MXSMIF HW block version 2 (checked with `CY_IP_MXSMIF_VERSION` define), MemorySPI interface clock frequency is twice lower than configured source HF clock, so if MemorySPI source HF clock is configured, for instance, for 50 MHz, connected memory will be accessed on 25 MHz clock. Interface clock frequency of MXSMIF block with version 1 corresponds to frequency of source HF clock.