PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

API Reference
SysPm (System Power Management)
PDL API Reference

## General Description

Use the System Power Management (SysPm) driver to change power modes and reduce system power consumption in power sensitive designs.

The functions and other declarations used in this driver are in cy_syspm.h. You can include cy_pdl.h to get access to all functions and declarations in the PDL.

For multi-CPU devices, this library allows you to individually enter low power modes for each CPU.

This document contains the following topics:

- Power Modes
- System Power Modes
  - Switching the System into Ultra Low Power
    - ULP Limitations
  - Switching the System into Low Power
    - LP Limitations
  - Switching CPU into Sleep
  - Switching the System into LPACTIVE/LPSLEEP
  - Switching the System or CPU into Deep Sleep
  - Switching the System or CPU into Deep Sleep-RAM
  - Switching the System or CPU into Deep Sleep-OFF
  - Waking Up from Sleep or Deep Sleep
  - Switching System to Hibernate
  - Waking Up from Hibernate
- System Active state Transitions
  - System ULP to LP Transition
  - System LP to HP Transition
  - System HP to LP Transition
  - System LP to ULP Transition

System Transitions

- System Regulator Current Mode
  - Setting Minimum System Regulator Current Mode
  - Setting Normal System Regulator Current Mode
- SysPm Callbacks
  - SysPm Callbacks Example
  - Callback Configuration Considerations
    - Callback Function Parameters
    - Callback Function Structure
    - Callback Function Implementation
    - Callbacks Execution Flow
    - Callback Registering
    - Callback Unregistering
- Definitions

# Configuration Considerations

## Power Modes

This device adopts the ARM Power Control Architecture. It supports the following power modes:

- ACTIVE, SLEEP - standard ARM defined power modes, supported by the ARM CPUs and ISA.
- LPACTIVE/LPSLEEP - are low power profiles implemented as register configurations within ACTIVE/SLEEP modes.
- DEEPSLEEP - a lower power mode where high-frequency clocks are disabled. Most register state is retained and the platform supports saving a configurable amount of SRAM state.
- DEEPSLEEP-RAM - a lower mode than DEEPSLEEP that keeps DeepSleep peripherals running, but on wakeup the CPU (and most peripherals) go through a reset. A configurable amount of system RAM is retained.
- DEEPSLEEP-OFF - similar to DEEPSLEEP-RAM but does not retain system RAM.
- HIBERNATE - is an even lower power mode than DEEPSLEEP-OFF, but on wakeup the CPU (and almost all peripherals) go through a full reset. DeepSleep peripherals do not operate in HIBERNATE.
- XRES - occurs when an external reset is applied, either XRES or alternate XRES (AXRES). It is also considered a power mode with a current target spec.
- OFF - state simply represents the state of the part with no power applied to it.
- SRSS implements an ARM Power Policy Unit (PPU) that provides the software interface to power mode control for VCCACT_PD.The PPU interacts with a Power Control State Machine (PSCM) that interfaces with the core SRSS to enter/exit DEEPSLEEP*.
- SRSS implements a Power Dependency Control Matrix (PDCM) that allows hardware and software to specify dependencies between power domains.

## System Power Modes

- LP - In this mode, code is executed and all logic and memories are powered. Firmware may disable/reduce clocks for specific peripherals and power down specific analog power domains.
- ULP - This power mode is like LP mode, but with clock restrictions and limited/slower peripherals to achieve lower current consumption. Refer to Switching the System into Ultra Low Power in Configuration considerations.
- LPACTIVE/LPSLEEP - low power profiles implemented as register configurations within ACTIVE/SLEEP modes.Refer to Switching the System into LPACTIVE/LPSLEEP in Configuration considerations.
- DEEPSLEEP - Is a lower power mode where high-frequency clocks are disabled. Refer to Switching the System or CPU into Deep Sleep in Configuration considerations. Deep-sleep-capable peripherals are available. A normal wakeup from Deep Sleep returns to either system LP or ULP mode, depending on the previous state and programmed behavior for the configured wakeup interrupt. Likewise, a debug wakes up from system Deep Sleep and woken CPU returns to CPU Sleep. Refer to Waking Up from Sleep or Deep Sleep in Configuration considerations.
- DEEPSLEEP-RAM - a lower mode than DEEPSLEEP that keeps DeepSleep peripherals running, but on wakeup the CPU (and most peripherals) go through a reset. A configurable amount of system RAM is retained.Refer to Switching the System or CPU into Deep Sleep-RAM in Configuration considerations. Refer to Waking Up from Sleep or Deep Sleep in Configuration considerations.
- DEEPSLEEP-OFF - similar to DEEPSLEEP-RAM but does not retain system RAM. Refer to Switching the System or CPU into Deep Sleep-OFF in Configuration considerations. Refer to Waking Up from Sleep or Deep Sleep in Configuration considerations.
- Hibernate - Is the lowest power mode that is entered from firmware. Refer to Switching System to Hibernate in Configuration considerations. On wakeup the CPU(s) and all peripherals go through a full reset. The I/O's state is frozen so that the output driver state is held in system Hibernate. Note that in this mode, the CPU(s) and all peripherals lose their states, so the system and firmware reboot on a wakeup event. Backup memory (if present) can be used to store limited system state for use on the next reboot. Refer to Waking Up from Hibernate in Configuration considerations.

Warning
  * Above is list of all the System Power modes in general, a device support subset of the above System Power modes.Please refer to TRM for more information.

### Switching the System into Low Power

To set system LP mode you need to set LP voltage for the active core regulator:

- If active core regulator is the LDO, call:
  Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_LP);
  CY_SYSPM_LDO_VOLTAGE_LP
  @ CY_SYSPM_LDO_VOLTAGE_LP
  System LP nominal LDO voltage.
  Definition: cy_syspm.h:1419
- If active core regulator is the Buck, call:
  Cy_SysPm_BuckSetVoltage1(CY_SYSPM_BUCK_OUT1_VOLTAGE_LP)
  CY_SYSPM_BUCK_OUT1_VOLTAGE_LP
  @ CY_SYSPM_BUCK_OUT1_VOLTAGE_LP
  LP nominal Buck voltage.
  Definition: cy_syspm.h:1443

After switching into system LP mode, the operating frequency and current consumption may now be increased up to LP Limitations. The wait states for flash may be changed to increase device performance by calling SysLib function Cy_SysLib_SetWaitStates(true, hfClkFreqMz), where hfClkFreqMz is the frequency of HfClk0 in MHz.

### LP Limitations

When the system is in LP mode, the core regulator voltage is set to 1.1 V (nominal) and the following limitations must be met:

- The maximum operating frequency for all Clk_HF paths must not exceed 150 MHz*, and peripheral and slow clock must not exceed 100 MHz *
- The total current consumption must be less than or equal to 250 mA *

Warning
  * - Numbers shown are approximate and real limit values may be different because they are device specific. You should refer to the device datasheet for exact values of maximum frequency and current in system LP mode.

### Switching the System into Ultra Low Power

Before switching into system ULP mode, ensure that the device meets ULP Limitations. Decrease the clock frequencies, and slow or disable peripherals. Also ensure that appropriate wait state values are set for the flash. Flash wait states can be set by calling SysLib function Cy_SysLib_SetWaitStates(true, hfClkFreqMz), where hfClkFreqMz is the frequency of HfClk0 in MHz.

After the ULP Limitations are met and appropriate wait states are set, you must set ULP voltage for the active core regulator:

- If active core regulator is the LDO Core Voltage Regulator, call Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_ULP)
- If active core regulator is the Buck Core Voltage Regulator, then call Cy_SysPm_BuckSetVoltage1(CY_SYSPM_BUCK_OUT1_VOLTAGE_ULP)

### ULP Limitations

When the system is in ULP mode the core regulator voltage is set to 0.9 V (nominal) and the following limitations must be meet:

- The maximum operating frequency for all Clk_HF paths must not exceed 50 MHz *, whereas the peripheral and slow clock must not exceed 25 MHz *.
- The total current consumption must be less than or equal to 20 mA*
- the flash write operations are prohibited. The flash works in the Read-only operation. If Write operations are required, you must switch to the system LP mode.

Warning
  * - Numbers shown are approximate and real limit values may be different because they are device specific. You should refer to the device datasheet for exact values of maximum frequency and current in system ULP mode.

### Switching the System into LPACTIVE/LPSLEEP

Call Cy_SysPm_SystemLpActiveEnter() to enter LPACTIVE/LPSLEEP mode and Cy_SysPm_SystemLpActiveExit() to exit.

### Switching CPU into Sleep

For multi-CPU devices, the Cy_SysPm_CpuEnterSleep() switches only the CPU that calls the function into the CPU Sleep power mode.

All pending interrupts must be cleared before the CPU is put into a Sleep mode, even if they are masked.

The CPU event register can be set in the past, for example, as a result of internal system calls. So an old event can cause the CPU to not enter Sleep mode upon WFE(). Therefore usually the WFE() is used in an idle loop or polling loop as it might or might not cause entering of CPU Sleep mode. If the idle loop or polling loop is not used, then it is recommended to use WFI() instruction.

### Switching the System or CPU into Deep Sleep

For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches only the CPU that calls the function into the CPU Deep Sleep power mode. To set the whole system into Deep Sleep power mode, ensure that all CPUs call the Cy_SysPm_CpuEnterDeepSleep() function.

### Switching the System or CPU into Deep Sleep-RAM

For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches only the CPU that calls the function into the CPU DEEPSLEEP-RAM power mode. To set the whole system into Deep Sleep power mode, ensure that all CPUs call the Cy_SysPm_CpuEnterDeepSleep() function.

### Switching the System or CPU into Deep Sleep-OFF

For multi-CPU devices, the Cy_SysPm_CpuEnterDeepSleep() function switches only the CPU that calls the function into the CPU DEEPSLEEP-OFF power mode. To set the whole system into Deep Sleep power mode, ensure that all CPUs call the Cy_SysPm_CpuEnterDeepSleep() function.

There are situations when the system does not switch into the Deep Sleep power mode immediately after the last CPU calls Cy_SysPm_CpuEnterDeepSleep(). The system will switch into Deep Sleep mode automatically a short time later, after the low power circuits are ready to switch into Deep Sleep. Refer to the Cy_SysPm_CpuEnterDeepSleep() description for more detail.

All pending interrupts must be cleared before the system is put into a Deep Sleep mode, even if they are masked.

The CPU event register can be set in the past, for example, as a result of internal system calls. So an old event can cause the CPU to not enter Deep Sleep mode upon WFE(). Therefore usually the WFE() is used in an idle loop or polling loop as it might or might not cause entering of CPU Deep Sleep mode. If the idle loop or polling loop is not used, then it is recommended to use WFI() instruction.

For single-CPU devices, SysPm functions that return the status of the unsupported CPU always return CY_SYSPM_STATUS_<CPU>_DEEPSLEEP.

### Waking Up from Sleep or Deep Sleep

For Arm-based devices, an interrupt is required for the CPU to wake up. For multi-CPU devices, one CPU can wake up the other CPU by sending the event instruction. Use the Cy_SysPm_CpuSendWakeupEvent() function.

### Switching System to Hibernate

If you call Cy_SysPm_SystemEnterHibernate() from either CPU, the system will be switched into the Hibernate power mode directly, because there is no handshake between CPUs.

### Waking Up from Hibernate

The system can wake up from Hibernate mode by configuring the following wakeup sources:

- Wakeup pin
- LP Comparator
- RTC alarm
- WDT interrupt

Wakeup is supported from device specific pin(s) with programmable polarity. Additionally, unregulated peripherals can wake the system under some conditions. For example, a low power comparator can wake the system by comparing two external voltages, but does not support comparison to an internally-generated voltage. The backup power domain remains functional, and if present it can schedule an alarm to wake the system from Hibernate using the RTC. Alternatively, the Watchdog Timer (WDT) can be configured to wake-up the system by WDT interrupt. Refer to Cy_SysPm_SetHibernateWakeupSource() for more detail.

## System Active state Transitions

The system operates in three defined active modes, each tailored for specific performance and power requirements:

- ULP (Ultra Low Power)
- LP (Low Power)
- HP (High Performance)

Transitioning between these operational modes requires meticulous adherence to defined sequences to prevent timing-related issues. The application is responsible for managing system frequency during these transitions, ensuring it stays within the valid range for both current and target modes. The driver assumes all frequency requirements are met before mode transition APIs are called.

Attention
  Transitions from ULP to HP modes (or vice versa) are only allowed in steps. These transitions must proceed via the intermediate LP mode (ULP -> LP -> HP or the reverse). This staged approach ensures system stability and reliable operations. These steps are handled internally by the driver when using one of the APIs: Cy_SysPm_SystemEnterHp(), Cy_SysPm_SystemEnterLp(), or Cy_SysPm_SystemEnterUlp().

The driver provides dedicated APIs for transitions:

- Cy_SysPm_SystemTransitionUlpToLp() - Transition from ULP to LP
- Cy_SysPm_SystemTransitionLpToHp() - Transition from LP to HP
- Cy_SysPm_SystemTransitionHpToLp() - Transition from HP to LP
- Cy_SysPm_SystemTransitionLpToUlp() - Transition from LP to ULP

The following sections outline the required conditions and sequence of operations for each supported transition.

## System ULP to LP Transition

To transition the system from Ultra Low Power (ULP) to Low Power (LP) mode, follow these steps in the secure processing environment:

1. Suspend Operations:
   1. Initiate M0SECCPUSS suspension with ifx_se_disable().
2. Reduce Operating Frequency:
   1. Lower the SRAM Clock frequency by at least 18%.
3. Initiate Transition:
   1. Call Cy_SysPm_SystemTransitionUlpToLp() to perform the mode change.
4. Restore Frequency:
   1. After the transition, the SRAM Clock frequency can be increased up to the new mode's maximum.
5. Resume Operations:
   1. Instruct M0SECCPUSS to resume operations by calling ifx_se_enable().

## System LP to HP Transition

To transition the system from Low Power (LP) to High Power (HP) mode, follow these steps in the secure processing environment:

1. Suspend Operations:
   1. Initiate M0SECCPUSS suspension with ifx_se_disable().
2. Reduce Operating Frequency:
   1. Lower the SRAM Clock frequency by at least 38%.
3. Initiate Transition:
   1. Call Cy_SysPm_SystemTransitionLpToHp() to perform the mode change.
4. Restore Frequency:
   1. After the transition, the SRAM Clock frequency can be increased up to the new mode's maximum.
5. Resume Operations:
   1. Instruct M0SECCPUSS to resume operations by calling ifx_se_enable().

## System HP to LP Transition

To transition the system from High Power (HP) to Low Power (LP) mode, follow these steps in the secure processing environment:

1. Suspend Operations:
   1. Initiate M0SECCPUSS suspension with ifx_se_disable().
2. Reduce Operating Frequency:
   1. Lower the SRAM Clock frequency by at least 82%.
3. Initiate Transition:
   1. Call Cy_SysPm_SystemTransitionHpToLp() to perform the mode change.
4. Restore Frequency:
   1. After the transition, the SRAM Clock frequency can be increased up to the new mode's maximum.
5. Resume Operations:
   1. Instruct M0SECCPUSS to resume operations by calling ifx_se_enable().

## System LP to ULP Transition

To transition the system from Low Power (LP) to Ultra Low Power (ULP) mode, follow these steps in the secure processing environment:

1. Suspend Operations:
   1. Initiate M0SECCPUSS suspension with ifx_se_disable().
2. Reduce Operating Frequency:
   1. Lower the SRAM Clock frequency by at least 66%.
3. Initiate Transition:
   1. Call Cy_SysPm_SystemTransitionLpToUlp() to perform the mode change.
4. Restore Frequency:
   1. After the transition, the SRAM Clock frequency can be increased up to the new mode's maximum.
5. Resume Operations:
   1. Instruct M0SECCPUSS to resume operations by calling ifx_se_enable().

## System Transitions

(Levels of Abstraction)

The driver supports two operational abstraction levels for system transitions:

1. High Level - The application invokes a single API that manages the entire transition workflow internally. This method simplifies development, requiring minimum user intervention, but offers limited opportunity for customization or speed optimization.
2. Low Level - The application remains responsible for all prerequisite checks and initiates each step of the transition sequence. This grants granular control, allowing adjustments for specialized use cases or the fastest possible transitions.

Attention
  The application is responsible for invoking the correct steps at the appropriate stage of transition:
  - High Level Approach:
    - Reduce operating frequency within the CY_SYSPM_BEFORE_TRANSITION callback.
    - Use the relevant transition function: Cy_SysPm_SystemEnterHp(), Cy_SysPm_SystemEnterLp(), or Cy_SysPm_SystemEnterUlp().
    - Restore operating frequency in the CY_SYSPM_AFTER_TRANSITION callback.
  - Low Level Approach:
    - The application must carefully follow the outlined sequences described in System Active state Transitions for the desired transition.

### SRAM Clock

When the system is performing a power transition all the clocks used to access the SRAM must be adapted to the new power mode. The SRAM clock frequency must be reduced before the transition and can be increased after the transition is completed.

## System Regulator Current Mode

In addition to system ULP and LP modes, the five different resource power settings can be configured to reduce current consumption:

1. Linear regulator low power mode. Can be used only if core current is below the LDO regulator LP threshold.
2. POR/BOD circuit low power mode. Requires compatible power supply stability due to stability increase response time.
3. Bandgap reference circuits low power mode (turns on Deep Sleep Bandgap). Requires design to accept reduced Vref accuracy. Active ref can be turned off after this feature is enabled.
4. Reference buffer circuit low power mode. Requires design to accept reduced Vref accuracy.
5. Current reference circuit low power mode. Require design to accept reduced Iref accuracy.

These five sub features can modify both system LP or ULP modes as they are independent from LP/ULP settings. When all five sub features are set to their low power modes, the system operates in regulator minimum current mode. In regulator minimum current mode, the system current consumption is limited to a device-specific value. Refer to the device datasheet for the exact current consumption value in regulator minimum current mode.

When all five sub features are set to their normal mode, the system operates in regulator normal current mode. When regulator normal current mode is set, the system may operate at device maximum current.

## Setting Minimum System Regulator Current Mode

Before setting the regulator minimum current mode ensure that current limits are be met. After current limits are met, call the Cy_SysPm_SystemSetMinRegulatorCurrent() function.

## Setting Normal System Regulator Current Mode

To set regulator normal current mode, call the Cy_SysPm_SystemSetNormalRegulatorCurrent() function. After the function call, the current limits can be increased to a maximum current, depending on what system power mode is set: LP or ULP.

## SysPm Callbacks

The SysPm driver handles low power callbacks declared in the application.

If there are no callbacks registered, the device executes the power mode transition. However, frequently your application firmware must make modifications for low power mode. For example, you may need to disable a peripheral, or ensure that a message is not being transmitted or received.

To enable this, the SysPm driver implements a callback mechanism. When a lower power mode transition is about to take place (either entering or exiting System Power Modes), the registered callbacks for that transition are called.

The SysPm driver organizes all the callbacks into a linked list. While entering a low power mode, SysPm goes through that linked list from first to last, executing the callbacks one after another. While exiting low power mode, SysPm goes through that linked list again, but in the opposite direction from last to first. This ordering supports prioritization of callbacks relative to the transition event.

For example, the picture below shows three callback structures organized into a linked list: myDeepSleep1, myDeepSleep2, myDeepSleep3 (represented with the cy_stc_syspm_callback_t configuration structure). Each structure contains, among other fields, the address of the callback function. The code snippets below set this up so that myDeepSleep1 is called first when entering the low power mode. This also means that myDeepSleep1 will be the last one to execute when exiting the low power mode.

The callback structures after registration:

Your application must register each callback, so that SysPm can execute it. Upon registration, the linked list is built by the SysPm driver. Notice the &myDeepSleep1 address in the myDeepSleep1 cy_stc_syspm_callback_t structure. This is filled in by the SysPm driver, when you register myDeepSleep1. The cy_stc_syspm_callback_t.order element defines the order of their execution by the SysPm driver. Call Cy_SysPm_RegisterCallback() to register each callback function.

A callback function is typically associated with a particular driver that handles the peripheral. So the callback mechanism enables a peripheral to prepare for a low power mode (for instance, shutting down the analog part); or to perform tasks while exiting a low power mode (like enabling the analog part again).

With the callback mechanism you can prevent switching into a low power mode if a peripheral is not ready. For example, driver X is in the process of receiving a message. In the callback function implementation simply return CY_SYSPM_FAIL in a response to CY_SYSPM_CHECK_READY.

If success is returned while executing a callback, the SysPm driver calls the next callback and so on to the end of the list. If at some point a callback returns CY_SYSPM_FAIL in response to the CY_SYSPM_CHECK_READY step, all the callbacks that have already executed are executed in reverse order, with the CY_SYSPM_CHECK_FAIL mode parameter. This allows each callback to know that entering the low power mode has failed. The callback can then undo whatever it did to prepare for low power mode, if required. For example, if the driver X callback shut down the analog part, it can re-enable the analog part.

Let's switch to an example explaining the implementation, setup, and registration of three callbacks (myDeepSleep1, myDeepSleep2, myDeepSleep2) in the application. The Callback Configuration Considerations are provided after the SysPm Callbacks Example.

## SysPm Callbacks Example

The following code snippets demonstrate how use the SysPm callbacks mechanism. We will build the prototype for an application that registers three callback functions:

1. myDeepSleep1 - Handles CPU Deep Sleep.
2. myDeepSleep2 - Handles CPU Deep Sleep and is associated with peripheral HW1_address (see PDL Design section to learn about the base hardware address).
3. myDeepSleep3 - Handles entering and exiting system Deep Sleep and is associated with peripheral HW2_address.

We set things up so that the myDeepSleep1 and myDeepSleep2 callbacks do nothing while entering the low power mode (skip on CY_SYSPM_SKIP_BEFORE_TRANSITION - see Callback Function Implementation in Callback Configuration Considerations). Skipping the actions while entering low power might be useful if you need to save time while switching low power modes. This is because the callback function with a skipped mode is not even called avoiding the call and return overhead.

Let's first declare the callback functions. Each gets the pointer to the cy_stc_syspm_callback_params_t structure as the argument.

/* Scenario: There is a need to have three callbacks for the CPU Deep Sleep
* mode. DeepSleepFunc1 and DeepSleepFunc2 callback function skip
* CY_SYSPM_BEFORE_TRANSITION mode.
* DeepSleepFunc3 executes all four modes.
* Note that for the multi-CPU devices the another CPU must be in CPU
* Deep Sleep power mode.
*/
/******************************************************************************
* Callback prototypes
******************************************************************************/
cy_en_syspm_status_t DeepSleepFunc1(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode);
cy_en_syspm_status_t DeepSleepFunc2(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode);
cy_en_syspm_status_t DeepSleepFunc3(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode);
cy_en_syspm_status_t
cy_en_syspm_status_t
The SysPm function return value status definitions.
Definition: cy_syspm.h:1352
cy_en_syspm_callback_mode_t
cy_en_syspm_callback_mode_t
This enumeration specifies the associated callback mode.
Definition: cy_syspm.h:1959
cy_stc_syspm_callback_params_t
The structure contains syspm callback parameters.
Definition: cy_syspm.h:2054

Now we setup the cy_stc_syspm_callback_params_t structures that we will pass to the callback functions. Note that for the myDeepSleep2 and myDeepSleep3 callbacks we also pass pointers to the peripherals related to that callback (see PDL Design section to learn about base hardware addresses). The configuration considerations related to this structure are described in Callback Function Parameters in Callback Configuration Considerations.

/******************************************************************************
* Parameter structures for callback functions
******************************************************************************/
cy_stc_syspm_callback_params_t deepSleepParam1 =
{
NULL,
NULL
};
cy_stc_syspm_callback_params_t deepSleepParam2 =
{
&HW1_address,
&context
};
cy_stc_syspm_callback_params_t deepSleepParam3 =
{
&HW2_address,
NULL
};

Now we setup the actual callback configuration structures. Each of these contains, among the other fields, the address of the cy_stc_syspm_callback_params_t we just set up. We will use the callback configuration structures later in the code to register the callbacks in the SysPm driver. Again, we set things up so that the myDeepSleep1 and myDeepSleep2 callbacks do nothing while entering the low power mode (skip on CY_SYSPM_SKIP_BEFORE_TRANSITION) - see Callback Function Implementation in Callback Configuration Considerations.

/******************************************************************************
* Callbacks structures
******************************************************************************/
cy_stc_syspm_callback_t myDeepSleep1 =
{
&DeepSleepFunc1,
CY_SYSPM_DEEPSLEEP,
CY_SYSPM_SKIP_BEFORE_TRANSITION,
&deepSleepParam1,
NULL,
NULL,
0
};
cy_stc_syspm_callback_t myDeepSleep2 =
{
&DeepSleepFunc2,
CY_SYSPM_DEEPSLEEP,
CY_SYSPM_SKIP_BEFORE_TRANSITION,
&deepSleepParam2,
NULL,
NULL,
0
};
cy_stc_syspm_callback_t myDeepSleep3 =
{
&DeepSleepFunc3,
CY_SYSPM_DEEPSLEEP,
0U,
&deepSleepParam3,
NULL,
NULL,
0
};
CY_SYSPM_DEEPSLEEP
@ CY_SYSPM_DEEPSLEEP
The Deep Sleep enum callback type.
Definition: cy_syspm.h:1519
cy_stc_syspm_callback_t
Structure with syspm callback configuration elements.
Definition: cy_syspm.h:2068
CY_SYSPM_SKIP_BEFORE_TRANSITION
#define CY_SYSPM_SKIP_BEFORE_TRANSITION
Define to skip before transition mode in the syspm callback.
Definition: cy_syspm.h:2042

Note that in each case the last two fields are NULL. These are fields used by the SysPm driver to set up the linked list of callback functions.

The callback structures are now defined and allocated in the user's memory space:

Now we implement the callback functions. See Callback Function Implementation in Callback Configuration Considerations for the instructions on how the callback functions should be implemented.

/******************************************************************************
* DeepSleepFunc1 implementation
******************************************************************************/
cy_en_syspm_status_t DeepSleepFunc1(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode)
{
cy_en_syspm_status_t retVal = CY_SYSPM_FAIL;
if (callbackParams != NULL)
{
/* In this use case we do not need to use HW address or context
* So, need to add code to some switch case with callbackParams to avoid
* compiler warnings
*/
}
switch(mode)
{
/* In this case ensure that firmware/hardware is ready for CPU
* Deep Sleep mode */
case CY_SYSPM_CHECK_READY:
if(true/* system is ready */)
{
/* Process the "check ready" condition */
retVal = CY_SYSPM_SUCCESS;
}
break;
/* One of the registered callback that was executed after this callback
* returned CY_SYSPM_FAIL, need to revert changes (if any) performed in
* the CY_SYSPM_CHECK_READY case.
*/
case CY_SYSPM_CHECK_FAIL:
{
/* Revert changes done in the CY_SYSPM_CHECK_READY case */
retVal = CY_SYSPM_SUCCESS;
}
break;
/* This case will be skipped during callbacks execution */
case CY_SYSPM_BEFORE_TRANSITION:
break;
/* This case is executed after wakeup from system Deep Sleep */
case CY_SYSPM_AFTER_TRANSITION:
{
/* Perform actions, if required, after wakeup from the
* system Deep Sleep mode */
retVal = CY_SYSPM_SUCCESS;
}
break;
default:
break;
}
return (retVal);
}
/******************************************************************************
* DeepSleepFunc2 implementation
******************************************************************************/
cy_en_syspm_status_t DeepSleepFunc2(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode)
{
CySCB_Type *hwBase = (CySCB_Type *) callbackParams->base;
cy_stc_scb_spi_context_t *spiContext = (cy_stc_scb_spi_context_t *) callbackParams->context;
cy_en_syspm_status_t retVal = CY_SYSPM_FAIL;
switch(mode)
{
/* Check is the HW1 ready to enter CPU Deep Sleep */
case CY_SYSPM_CHECK_READY:
{
/* ... */
if (0UL == (CY_SCB_SPI_TRANSFER_ACTIVE & Cy_SCB_SPI_GetTransferStatus(hwBase, spiContext)))
{
/* There are no active actions so we can enter CPU Deep Sleep */
retVal = CY_SYSPM_SUCCESS;
}
break;
}
default:
retVal = CY_SYSPM_FAIL;
break;
}
return (retVal);
}
/******************************************************************************
* DeepSleepFunc3 implementation
******************************************************************************/
cy_en_syspm_status_t DeepSleepFunc3(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode)
{
CySCB_Type *hwBase = (CySCB_Type *) callbackParams->base;
cy_en_syspm_status_t retVal = CY_SYSPM_FAIL;
switch(mode)
{
/* Check is the HW2 ready to enter into CPU Deep Sleep */
case CY_SYSPM_CHECK_READY:
{
if (!Cy_SCB_SPI_IsBusBusy(hwBase))
{
/* Process the "check ready" condition */
retVal = CY_SYSPM_SUCCESS;
}
break;
}
case CY_SYSPM_BEFORE_TRANSITION:
{
/* Switch - Turn off SCB SPI */
retVal = CY_SYSPM_SUCCESS;
break;
}
case CY_SYSPM_AFTER_TRANSITION:
{
/* Switch - Turn on SCB SPI */
retVal = CY_SYSPM_SUCCESS;
break;
}
case CY_SYSPM_CHECK_FAIL:
{
/* Revert changes made in CY_SYSPM_CHECK_READY switch case (if any) */
break;
}
default:
break;
}
return (retVal);
}
cy_stc_scb_spi_context_t
SPI context structure.
Definition: cy_scb_spi.h:608
Cy_SCB_SPI_IsBusBusy
__STATIC_INLINE bool Cy_SCB_SPI_IsBusBusy(CySCB_Type const *base)
Returns whether the SPI bus is busy or not.
Definition: cy_scb_spi.h:983
Cy_SCB_SPI_GetTransferStatus
uint32_t Cy_SCB_SPI_GetTransferStatus(CySCB_Type const *base, cy_stc_scb_spi_context_t const *context)
Returns the status of the transfer operation started by Cy_SCB_SPI_Transfer.
Definition: cy_scb_spi.c:1007
CY_SCB_SPI_TRANSFER_ACTIVE
#define CY_SCB_SPI_TRANSFER_ACTIVE
Transfer operation started by Cy_SCB_SPI_Transfer is in progress.
Definition: cy_scb_spi.h:820
CY_SYSPM_FAIL
@ CY_SYSPM_FAIL
Unknown failure.
Definition: cy_syspm.h:1360
CY_SYSPM_SUCCESS
@ CY_SYSPM_SUCCESS
Successful.
Definition: cy_syspm.h:1353
CY_SYSPM_BEFORE_TRANSITION
@ CY_SYSPM_BEFORE_TRANSITION
Callbacks with this mode are executed after the CY_SYSPM_CHECK_READY callbacks execution returns CY_S...
Definition: cy_syspm.h:1968
CY_SYSPM_CHECK_FAIL
@ CY_SYSPM_CHECK_FAIL
Callbacks with this mode are executed after the CY_SYSPM_CHECK_READY callbacks execution returns CY_S...
Definition: cy_syspm.h:1963
CY_SYSPM_AFTER_TRANSITION
@ CY_SYSPM_AFTER_TRANSITION
Performs the actions to be done after exiting the low power mode if entered.
Definition: cy_syspm.h:1972
CY_SYSPM_CHECK_READY
@ CY_SYSPM_CHECK_READY
Callbacks with this mode are executed before entering into the low power mode.
Definition: cy_syspm.h:1960
cy_stc_syspm_callback_params_t::base
void * base
Base address of a HW instance, matches name of the driver in the API for the base address.
Definition: cy_syspm.h:2055
cy_stc_syspm_callback_params_t::context
void * context
Context for the handler function.
Definition: cy_syspm.h:2058
CySCB_Type
Serial Communications Block (SPI/UART/I2C) (CySCB)
Definition: cyip_scb.h:38

Finally, we register the callbacks so that the SysPm driver knows about them. The order in which the callbacks will be called depends upon the order in which the callbacks are registered. If there are no callbacks registered, the device just executes the power mode transition.

Callbacks that reconfigure global resources, such as clock frequencies, should be registered last. They then modify global resources as the final step before entering the low power mode, and restore those resources first, as the system returns from low power mode.

/* Register myDeepSleep1 */
if (true != Cy_SysPm_RegisterCallback(&myDeepSleep1))
{
/* Insert error handling */
}
/* Register myDeepSleep2 */
if (true != Cy_SysPm_RegisterCallback(&myDeepSleep2))
{
/* Insert error handling */
}
/* Register myDeepSleep3 */
if (true != Cy_SysPm_RegisterCallback(&myDeepSleep3))
{
/* Insert error handling */
}
Cy_SysPm_RegisterCallback
bool Cy_SysPm_RegisterCallback(cy_stc_syspm_callback_t *handler)
Registers a new syspm callback.
Definition: cy_syspm_v4.c:2063

We are done configuring three callbacks. Now the SysPm driver will execute the callbacks appropriately whenever there is a call to a power mode transition function: Cy_SysPm_CpuEnterSleep(), Cy_SysPm_CpuEnterDeepSleep(), Cy_SysPm_SystemEnterUlp(), Cy_SysPm_SystemEnterLp(), and Cy_SysPm_SystemEnterHibernate().

Note
  On a wakeup from hibernate the device goes through a reset, so the callbacks with CY_SYSPM_AFTER_TRANSITION are not executed. Refer to Cy_SysPm_SystemEnterHibernate() for more detail.

Refer to Callback Unregistering in Callback Configuration Considerations to learn what to do if you need to remove the callback from the linked list. You might want to unregister the callback for debug purposes.

Refer to Callbacks Execution Flow in Callback Configuration Considerations to learn about how the SysPm processes the callbacks.

## Callback Configuration Considerations

### Callback Function Parameters

The callbackParams parameter of the callback function is a cy_stc_syspm_callback_params_t structure. The second parameter (mode) is for internal use. In the example code we used a dummy value CY_SYSPM_CHECK_READY to eliminate compilation errors associated with the enumeration. The driver sets the mode field to the correct value when calling the callback functions (the mode is referred to as step in the Callback Function Implementation). The callback function reads the value and executes code based on the mode set by the SysPm driver. The base and context fields are optional and can be NULL. Some drivers require a base hardware address and context to store information about the mode transition. If your callback routine requires access to the driver registers or context, provide those values (see PDL Design section to learn about Base Hardware Address). Be aware of MISRA warnings if these parameters are NULL.

### Callback Function Structure

For each callback, provide a cy_stc_syspm_callback_t structure. Some fields in this structure are maintained by the driver. Use NULL for cy_stc_syspm_callback_t.prevItm and cy_stc_syspm_callback_t.nextItm. Driver uses these fields to build a linked list of callback functions. The value of cy_stc_syspm_callback_t.order element is used to define the order how the callbacks are put into linked list, and sequentially, how the callbacks are executed. See Callback Registering section.

Warning
  The Cy_SysPm_RegisterCallback() function stores a pointer to the cy_stc_syspm_callback_t structure. Do not modify elements of the cy_stc_syspm_callback_t structure after the callback is registered. You are responsible for ensuring that the structure remains in scope. Typically the structure is declared as a global or static variable, or as a local variable in the main() function.

### Callback Function Implementation

Every callback function should handle four possible steps (referred to as "mode") defined in cy_en_syspm_callback_mode_t :

- CY_SYSPM_CHECK_READY - Check if ready to enter a power mode.
- CY_SYSPM_BEFORE_TRANSITION - The actions to be done before entering the low power mode.
- CY_SYSPM_AFTER_TRANSITION - The actions to be done after exiting the low power mode.
- CY_SYSPM_CHECK_FAIL - Roll back any actions performed in the callback executed previously with CY_SYSPM_CHECK_READY.

A callback function can skip steps (see Defines to skip the callbacks modes). In our example myDeepSleep1 and myDeepSleep2 callbacks do nothing while entering the low power mode (skip on CY_SYSPM_BEFORE_TRANSITION). If there is anything preventing low power mode entry - return CY_SYSPM_FAIL in response to CY_SYSPM_CHECK_READY in your callback implementation. Note that the callback should return CY_SYSPM_FAIL only in response to CY_SYSPM_CHECK_READY. The callback function should always return CY_SYSPM_PASS for other modes: CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION (see Callbacks Execution Flow).

### Callbacks Execution Flow

This section explains what happens during a power transition, when callbacks are implemented and set up correctly. The following discussion assumes:

- All required callback functions are defined and implemented
- All cy_stc_syspm_callback_t structures are filled with required values
- All callbacks are successfully registered

User calls one of the power mode transition functions: Cy_SysPm_CpuEnterSleep(), Cy_SysPm_CpuEnterDeepSleep(), Cy_SysPm_SystemEnterUlp(), Cy_SysPm_SystemEnterLp(), or Cy_SysPm_SystemEnterHibernate(). It calls each callback with the mode set to CY_SYSPM_CHECK_READY. This triggers execution of the code for that mode inside of each user callback.

The intent of CY_SYSPM_CHECK_READY is to only signal if the resources is ready to transition. Ideally, no transition changes should be made at this time. In some cases a small change may be required. For example a communication resource callback may set a flag telling firmware not to start any new transition.

If that process is successful for all callbacks, then Cy_SysPm_ExecuteCallback() calls each callback with the mode set to CY_SYSPM_BEFORE_TRANSITION. This triggers execution of the code for that mode inside each user callback. We then enter the low power mode after all callback are executed.

When exiting the low power mode, the SysPm driver executes Cy_SysPm_ExecuteCallback() again. This time it calls each callback in reverse order, with the mode set to CY_SYSPM_AFTER_TRANSITION. This triggers execution of the code for that mode inside each user callback. The final execution of callbacks depends on the low power mode in which callbacks were called:

- For CPU Sleep or Deep Sleep power modes, the CY_SYSPM_AFTER_TRANSITION mode is called after the CPU wakes from Sleep or Deep Sleep.
- For system Hibernate, the CY_SYSPM_AFTER_TRANSITION mode is not executed because the device reboots after the wakeup from the Hibernate.
- For system LP and ULP modes, after the CY_SYSPM_AFTER_TRANSITION mode was called the system remains in the new power mode: LP or ULP.

A callback can return CY_SYSPM_FAIL only while executing the CY_SYSPM_CHECK_READY mode. If that happens, then the remaining callbacks are not executed. Any callbacks that have already executed are called again, in reverse order, with CY_SYSPM_CHECK_FAIL. This allows the system to return to the previous state. If a callback returns a fail then any of the functions (Cy_SysPm_CpuEnterSleep(), Cy_SysPm_CpuEnterDeepSleep(), Cy_SysPm_SystemEnterUlp(), Cy_SysPm_SystemEnterLp(), or Cy_SysPm_SystemEnterHibernate()) that attempt to switch the device into a low power mode will also return CY_SYSPM_FAIL.

Callbacks that reconfigure global resources, such as clock frequencies, should be registered last. They then modify global resources as the final step before entering the low power mode, and restore those resources first, as the system returns from low power mode.

### Callback Registering

While registration the callback is put into the linked list. The place where the callback structure is put into the linked list is based on cy_stc_syspm_callback_t.order. The callback with the lowest cy_stc_syspm_callback_t.order value will be placed at the beginning of linked list. The callback with the highest cy_stc_syspm_callback_t.order value will be placed at the end of the linked list. If there is already a callback structure in the linked list with the same cy_stc_syspm_callback_t.order value as you attend to register, then your callback will be placed right after such a callback.

Such a registration order defines how the callbacks are executed:

- Callbacks with the lower cy_stc_syspm_callback_t.order are executed first when entering into low power and last when exiting from low power.
- Callbacks with the higher cy_stc_syspm_callback_t.order are executed last when entering into low power and first when exiting from low power.

/* Register myDeepSleep1 */
if (true != Cy_SysPm_RegisterCallback(&myDeepSleep1))
{
/* Insert error handling */
}
/* Register myDeepSleep2 */
if (true != Cy_SysPm_RegisterCallback(&myDeepSleep2))
{
/* Insert error handling */
}
/* Register myDeepSleep3 */
if (true != Cy_SysPm_RegisterCallback(&myDeepSleep3))
{
/* Insert error handling */
}

Callbacks with equal cy_stc_syspm_callback_t.order values are registered in the same order as they are registered:

Callbacks with a different cy_stc_syspm_callback_t.order value will be stored based on the cy_stc_syspm_callback_t.order value, with no matter when they when registered:

This can be useful to ensure that system resources (clock dividers, etc) are changed right before entering low power mode and immediately after exiting from low power.

### Callback Unregistering

Unregistering the callback might be useful when you need to dynamically manage the callbacks.

/* Scenario: There is a need to unregister a previously registered callback */
if (true != Cy_SysPm_UnregisterCallback(&myDeepSleep2))
{
/* Insert error handler */
}
Cy_SysPm_UnregisterCallback
bool Cy_SysPm_UnregisterCallback(cy_stc_syspm_callback_t const *handler)
This function unregisters a callback.
Definition: cy_syspm_v4.c:2130

The callback structures after myDeepSleep2 callback is unregistered:

# Secure Aware SYSPM

Some SYSPM APIs are marked as Secure Aware. This means that if the resource in SYSPM is marked as a secure region in the Peripheral Protection Controller (PPC) and these APIs are called from a non-secure CPU state, the PDL will submit a request to the Secure Request Framework (SRF) middleware to transition to a secure CPU state to perform the operation. From the application's perspective, the API will behave the same whether it is called from a secure or non-secure CPU state albeit slower.

This functionality is automatically enabled on devices with ARM TrustZone processors. To disable, set the DEFINE+=CY_PDL_ENABLE_SECURE_AWARE_SYSPM=0 in the application Makefile.

For more information on Secure Aware PDL behavior, see Secure Aware PDL.

# Definitions

Term | Definition
--- | ---
LDO | Low dropout linear regulator. The functions that manage this block are grouped as LDO under Core Voltage Regulation
SIMO Buck | Single inductor multiple Output Buck regulator, referred as "Buck regulator" throughout the documentation. The functions that manage this block are grouped as Buck under Core Voltage Regulation
SISO Buck | Single inductor single output Buck regulator, referred as "Buck regulator" throughout the documentation. The functions that manage this block are grouped as Buck under Core Voltage Regulation
PMIC | Power management integrated circuit. The functions that manage this block are grouped as group_syspm_functions_pmic
LP | System low power mode. See the Switching the System into Low Power section for details.
ULP | System ultra low power mode. See the Switching the System into Ultra Low Power section for details.

# More Information

For more information on the SysPm driver, refer to the technical reference manual (TRM).

## API Reference
| PDCM (Power Dependency Control Matrix)
| PDCM driver provides APIs for controlling the Power Dependency Control Matrix across Power Domains.
| PPU (Power Policy Unit)
| Power Domain PPU driver is a platform dependent driver on top of ARM PPU Driver.
| Macros
| Functions
| Data Structures
| Enumerated Types