PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Functions
Functions
PDL API Reference » SysClk (System Clock) » Peripherals Clock Dividers

## General Description

## Functions
cy_en_sysclk_status_t | Cy_SysClk_PeriPclkSetDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t dividerValue)
| Sets one of the programmable clock dividers. More...
uint32_t | Cy_SysClk_PeriPclkGetDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Returns the integer divider value for the specified divider. More...
void | Cy_SysClk_PeriPclkGetFracDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t *dividerIntValue, uint32_t *dividerFracValue)
| Reports the integer and fractional parts of the divider. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriPclkSetFracDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t dividerIntValue, uint32_t dividerFracValue)
| Sets one of the programmable clock dividers. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriPclkAssignDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Assigns a programmable divider to a selected IP block, such as a TCPWM or SCB. More...
uint32_t | Cy_SysClk_PeriPclkGetAssignedDivider (en_clk_dst_t ipBlock)
| Reports which clock divider is assigned to a selected IP block. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriPclkEnableDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Enables the selected divider. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriPclkDisableDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Disables a selected divider. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriPclkEnablePhaseAlignDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum, cy_en_divider_types_t dividerTypePA, uint32_t dividerNumPA)
| First disables a selected divider (Cy_SysClk_PeriphDisableDivider), then aligns that divider to another programmable divider, and enables the selected divider. More...
uint32_t | Cy_SysClk_PeriPclkGetFrequency (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Reports the frequency of the output of a given peripheral divider. More...
bool | Cy_SysClk_PeriPclkGetDividerEnabled (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Reports the enabled/disabled state of the selected divider. More...
uint32_t | Cy_Sysclk_PeriPclkGetClkHfNum (uint32_t ipBlock)
| Reports the corresponding CLK_HF* number for a particular PERI PCLK group. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriphSetDivider (cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t dividerValue)
| Sets one of the programmable clock dividers. More...
uint32_t | Cy_SysClk_PeriphGetDivider (cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Returns the integer divider value for the specified divider. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriphSetFracDivider (cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t dividerIntValue, uint32_t dividerFracValue)
| Sets one of the programmable clock dividers. More...
void | Cy_SysClk_PeriphGetFracDivider (cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t *dividerIntValue, uint32_t *dividerFracValue)
| Reports the integer and fractional parts of the divider. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriphAssignDivider (en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Assigns a programmable divider to a selected IP block, such as a TCPWM or SCB. More...
uint32_t | Cy_SysClk_PeriphGetAssignedDivider (en_clk_dst_t ipBlock)
| Reports which clock divider is assigned to a selected IP block. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriphEnableDivider (cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Enables the selected divider. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriphDisableDivider (cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Disables a selected divider. More...
cy_en_sysclk_status_t | Cy_SysClk_PeriphEnablePhaseAlignDivider (cy_en_divider_types_t dividerType, uint32_t dividerNum, cy_en_divider_types_t dividerTypePA, uint32_t dividerNumPA)
| First disables a selected divider (Cy_SysClk_PeriphDisableDivider), then aligns that divider to another programmable divider, and enables the selected divider. More...
bool | Cy_SysClk_PeriphGetDividerEnabled (cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Reports the enabled/disabled state of the selected divider. More...
uint32_t | Cy_SysClk_PeriphGetFrequency (cy_en_divider_types_t dividerType, uint32_t dividerNum)
| Reports the frequency of the output of a given peripheral divider. More...

## Function Documentation

## ◆ Cy_SysClk_PeriPclkSetDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriPclkSetDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum,
|  | uint32_t | dividerValue
| ) |  |

Sets one of the programmable clock dividers.

This is only used for integer dividers. Use Cy_SysClk_PeriphSetFracDivider for setting factional dividers.

Precondition
  If the specified clock divider is already enabled - it should be disabled prior to use this function by Cy_SysClk_PeriphDisableDivider.

Note
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region is PROT_PERIx_PERI_PCLKx_MAIN. See Secure Aware SysCLK for further details.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | the divider number.
  dividerValue | divider value Causes integer division of (divider value + 1), or division by 1 to 256 (8-bit divider) or 1 to 65536 (16-bit divider).

Returns
  cy_en_sysclk_status_t

## ◆ Cy_SysClk_PeriPclkGetDivider()

uint32_t Cy_SysClk_PeriPclkGetDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Returns the integer divider value for the specified divider.

One works for integer dividers. Use Cy_SysClk_PeriphGetFracDivider to get the fractional divider value

Note
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region is PROT_PERIx_PERI_PCLKx_MAIN. See Secure Aware SysCLK for further details.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure

Returns
  The divider value. The integer division done is by (divider value + 1), or division by 1 to 256 (8-bit divider) or 1 to 65536 (16-bit divider).

## ◆ Cy_SysClk_PeriPclkGetFracDivider()

void Cy_SysClk_PeriPclkGetFracDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum,
|  | uint32_t * | dividerIntValue,
|  | uint32_t * | dividerFracValue
| ) |  |

Reports the integer and fractional parts of the divider.

Note
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region is PROT_PERIx_PERI_PCLKx_MAIN. See Secure Aware SysCLK for further details.
  Ensure that dividerIntValue and dividerFracValue arguments are DCache aligned when calling from a non-secured Core onto a secured hardware resource. This is only relevent for cross-core calls, not calls between security contexts on the same core.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure
  *dividerIntValue | pointer to return integer divider value
  *dividerFracValue | pointer to return fractional divider value

Returns
  None. Loads pointed-to variables.

## ◆ Cy_SysClk_PeriPclkSetFracDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriPclkSetFracDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum,
|  | uint32_t | dividerIntValue,
|  | uint32_t | dividerFracValue
| ) |  |

Sets one of the programmable clock dividers.

This function should only be used for fractional clock dividers.

Precondition
  If the specified clock divider is already enabled - it should be disabled prior to use this function by Cy_SysClk_PeriphDisableDivider.

Note
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region is PROT_PERIx_PERI_PCLKx_MAIN. See Secure Aware SysCLK for further details.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure
  dividerIntValue | the integer divider value The source of the divider is peri_clk, which is a divided version of hf_clk[0]. The divider value causes integer division of (divider value + 1), or division by 1 to 65536 (16-bit divider) or 1 to 16777216 (24-bit divider).
  dividerFracValue | the fraction part of the divider The fractional divider can be 0-31, thus it divides the clock by 1/32 for each count. To divide the clock by 11/32nds set this value to 11.

Returns
  cy_en_sysclk_status_t

## ◆ Cy_SysClk_PeriPclkAssignDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriPclkAssignDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Assigns a programmable divider to a selected IP block, such as a TCPWM or SCB.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure

Returns
  cy_en_sysclk_status_t

## ◆ Cy_SysClk_PeriPclkGetAssignedDivider()

uint32_t Cy_SysClk_PeriPclkGetAssignedDivider | ( | en_clk_dst_t | ipBlock | ) |

Reports which clock divider is assigned to a selected IP block.

Note
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region is PROT_PERIx_PERI_PCLKx_MAIN. See Secure Aware SysCLK for further details.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.

Returns
  The divider type and number. These are returned in one value, which can be split using the CY_PERI_CLOCK_CTL_DIV_SEL_Msk and CY_PERI_CLOCK_CTL_TYPE_SEL_Msk bitmasks.

## ◆ Cy_SysClk_PeriPclkEnableDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriPclkEnableDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Enables the selected divider.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure

Note
  This function also sets the phase alignment bits such that the enabled divider is aligned to clk_peri. See Cy_SysClk_PeriphDisableDivider() for information on how to phase-align a divider after it is enabled.
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region is PROT_PERIx_PERI_PCLKx_MAIN. See Secure Aware SysCLK for further details..

## ◆ Cy_SysClk_PeriPclkDisableDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriPclkDisableDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Disables a selected divider.

Note
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region is PROT_PERIx_PERI_PCLKx_MAIN. See Secure Aware SysCLK for further details.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t.
  dividerNum | specifies which divider of the selected type to configure.

## ◆ Cy_SysClk_PeriPclkEnablePhaseAlignDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriPclkEnablePhaseAlignDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum,
|  | cy_en_divider_types_t | dividerTypePA,
|  | uint32_t | dividerNumPA
| ) |  |

First disables a selected divider (Cy_SysClk_PeriphDisableDivider), then aligns that divider to another programmable divider, and enables the selected divider.

The divider to align to must already be enabled in order to align a divider to it.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t.
  dividerNum | specifies which divider of the selected type to configure.
  dividerTypePA | type of divider to phase-align to; cy_en_divider_types_t.
  dividerNumPA | divider number of type specified to phase align to.

Note
  To phase-align a divider to clk_peri, set dividerTypePA to 3 and dividerNumPA to 63.

## ◆ Cy_SysClk_PeriPclkGetFrequency()

uint32_t Cy_SysClk_PeriPclkGetFrequency | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Reports the frequency of the output of a given peripheral divider.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure

Returns
  The frequency, in Hz.

Note
  The reported frequency may be zero, which indicates unknown. This happens if the source input is dsi_out or clk_altlf.
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region are PROT_PERIx_PERI_PCLKx_MAIN/PROT_PERI0_SRSS_MAIN/PROT_PERI0_SRSS_GENERAL. (PROT_PERIx_PERI_PCLKx_MAIN/PROT_PERI0_SRSS_MAIN/PROT_PERI0_SRSS_GENERAL) can be (secure/secure/secure), (non-secure/secure/secure), or (non-secure/non-secure/non-secure)

See Secure Aware SysCLK for further details.

Function Usage
  /* Scenario: SCB0 needs to be clocked at PeriClk/3. Need to confirm that the
  set frequency on the chosen peripheral divider is correct.
  HFCLK0 and the clocks leading up it are configured. */
  /* Set the Peri clock divider to 2 (1 + 1) */
  Cy_SysClk_ClkPeriSetDivider(1U);
  /* Assign 8-bit divider #0 to source SCB0 clock */
  (void)Cy_SysClk_PeriphAssignDivider(PCLK_SCB0_CLOCK, CY_SYSCLK_DIV_8_BIT, 0UL);
  /* Set the 8-bit divider #0 value to 3 (2 + 1) */
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 0UL, 2UL);
  /* Enable the 8-bit divider #0 */
  (void)Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 0UL);
  /* Calculate the frequency seen at the output of 8-bit divider #0 */
  uint32_t scbFreq = Cy_SysClk_PeriphGetFrequency(CY_SYSCLK_DIV_8_BIT, 0UL);
  if(scbFreq == 0UL)
  {
  /* Could not calculate the frequency. Check that the clock source
  is correct and/or verify by enabling the SCB0. */
  }
  else
  {
  /* Check that the frequency is as expected. */
  }
  CY_SYSCLK_DIV_8_BIT
  @ CY_SYSCLK_DIV_8_BIT
  Divider Type is an 8 bit divider.
  Definition: cy_sysclk.h:3336
  Cy_SysClk_PeriphEnableDivider
  cy_en_sysclk_status_t Cy_SysClk_PeriphEnableDivider(cy_en_divider_types_t dividerType, uint32_t dividerNum)
  Enables the selected divider.
  Definition: cy_sysclk_v2.c:2189
  Cy_SysClk_PeriphAssignDivider
  cy_en_sysclk_status_t Cy_SysClk_PeriphAssignDivider(en_clk_dst_t ipBlock, cy_en_divider_types_t dividerType, uint32_t dividerNum)
  Assigns a programmable divider to a selected IP block, such as a TCPWM or SCB.
  Definition: cy_sysclk_v2.c:2175
  Cy_SysClk_PeriphGetFrequency
  uint32_t Cy_SysClk_PeriphGetFrequency(cy_en_divider_types_t dividerType, uint32_t dividerNum)
  Reports the frequency of the output of a given peripheral divider.
  Definition: cy_sysclk_v2.c:2132
  Cy_SysClk_PeriphSetDivider
  cy_en_sysclk_status_t Cy_SysClk_PeriphSetDivider(cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t dividerValue)
  Sets one of the programmable clock dividers.
  Definition: cy_sysclk_v2.c:2142

## ◆ Cy_SysClk_PeriPclkGetDividerEnabled()

bool Cy_SysClk_PeriPclkGetDividerEnabled | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Reports the enabled/disabled state of the selected divider.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t.
  dividerNum | specifies which divider of the selected type to configure.

Note
  This API is Secure Aware. On devices with ARM TrustZone enabled, it is safe to call on a Secure hardware resource from a Non-Secure CPU state. The involved PPC region is PROT_PERIx_PERI_PCLKx_MAIN. See Secure Aware SysCLK for further details.

## ◆ Cy_Sysclk_PeriPclkGetClkHfNum()

uint32_t Cy_Sysclk_PeriPclkGetClkHfNum | ( | uint32_t | ipBlock | ) |

Reports the corresponding CLK_HF* number for a particular PERI PCLK group.

Note
  For devices with ARM TrustZone enabled, this API is safe to call from both the secure and non-secure CPU state. See Secure Aware SysCLK for further details.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.

Returns
  The CLK_HF* number.

## ◆ Cy_SysClk_PeriphSetDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriphSetDivider | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum,
|  | uint32_t | dividerValue
| ) |  |

Sets one of the programmable clock dividers.

This is only used for integer dividers. Use Cy_SysClk_PeriphSetFracDivider for setting factional dividers.

Precondition
  If the specified clock divider is already enabled - it should be disabled prior to use this function by Cy_SysClk_PeriphDisableDivider.

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | the divider number.
  dividerValue | divider value Causes integer division of (divider value + 1), or division by 1 to 256 (8-bit divider) or 1 to 65536 (16-bit divider).

Returns
  cy_en_sysclk_status_t

Note
  This API is deprecated, use Cy_SysClk_PeriPclkSetDivider.

Function Usage
  /* Scenario: 16-bit peripheral divider #2 needs to be incremented by 1. */
  uint32_t periDiv = Cy_SysClk_PeriphGetDivider(CY_SYSCLK_DIV_16_BIT, 2UL);
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 2UL, periDiv + 1UL);
  CY_SYSCLK_DIV_16_BIT
  @ CY_SYSCLK_DIV_16_BIT
  Divider Type is a 16 bit divider.
  Definition: cy_sysclk.h:3337
  Cy_SysClk_PeriphGetDivider
  uint32_t Cy_SysClk_PeriphGetDivider(cy_en_divider_types_t dividerType, uint32_t dividerNum)
  Returns the integer divider value for the specified divider.
  Definition: cy_sysclk_v2.c:2150

## ◆ Cy_SysClk_PeriphGetDivider()

uint32_t Cy_SysClk_PeriphGetDivider | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Returns the integer divider value for the specified divider.

One works for integer dividers. Use Cy_SysClk_PeriphGetFracDivider to get the fractional divider value

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure

Returns
  The divider value. The integer division done is by (divider value + 1), or division by 1 to 256 (8-bit divider) or 1 to 65536 (16-bit divider).

Note
  This API is deprecated, use Cy_SysClk_PeriPclkGetDivider.

Function Usage
  /* Scenario: 16-bit peripheral divider #2 needs to be incremented by 1. */
  uint32_t periDiv = Cy_SysClk_PeriphGetDivider(CY_SYSCLK_DIV_16_BIT, 2UL);
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 2UL, periDiv + 1UL);

## ◆ Cy_SysClk_PeriphSetFracDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriphSetFracDivider | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum,
|  | uint32_t | dividerIntValue,
|  | uint32_t | dividerFracValue
| ) |  |

Sets one of the programmable clock dividers.

This function should only be used for fractional clock dividers.

Precondition
  If the specified clock divider is already enabled - it should be disabled prior to use this function by Cy_SysClk_PeriphDisableDivider.

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure
  dividerIntValue | the integer divider value The source of the divider is peri_clk, which is a divided version of hf_clk[0]. The divider value causes integer division of (divider value + 1), or division by 1 to 65536 (16-bit divider) or 1 to 16777216 (24-bit divider).
  dividerFracValue | the fraction part of the divider The fractional divider can be 0-31, thus it divides the clock by 1/32 for each count. To divide the clock by 11/32nds set this value to 11.

Returns
  cy_en_sysclk_status_t

Note
  This API is deprecated, use Cy_SysClk_PeriPclkSetFracDivider.

Function Usage
  /* Scenario: 16-bit fractional peripheral divider #0 needs to increment its
  fractional value by 2. */
  uint32_t divIntVal, divFracVal;
  Cy_SysClk_PeriphGetFracDivider(CY_SYSCLK_DIV_16_5_BIT, 0UL, &divIntVal, &divFracVal);
  (void)Cy_SysClk_PeriphSetFracDivider(CY_SYSCLK_DIV_16_5_BIT, 0UL, divIntVal, divFracVal + 2UL);
  CY_SYSCLK_DIV_16_5_BIT
  @ CY_SYSCLK_DIV_16_5_BIT
  Divider Type is a 16.5 bit fractional divider.
  Definition: cy_sysclk.h:3338
  Cy_SysClk_PeriphGetFracDivider
  void Cy_SysClk_PeriphGetFracDivider(cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t *dividerIntValue, uint32_t *dividerFracValue)
  Reports the integer and fractional parts of the divider.
  Definition: cy_sysclk_v2.c:2166
  Cy_SysClk_PeriphSetFracDivider
  cy_en_sysclk_status_t Cy_SysClk_PeriphSetFracDivider(cy_en_divider_types_t dividerType, uint32_t dividerNum, uint32_t dividerIntValue, uint32_t dividerFracValue)
  Sets one of the programmable clock dividers.
  Definition: cy_sysclk_v2.c:2158

## ◆ Cy_SysClk_PeriphGetFracDivider()

void Cy_SysClk_PeriphGetFracDivider | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum,
|  | uint32_t * | dividerIntValue,
|  | uint32_t * | dividerFracValue
| ) |  |

Reports the integer and fractional parts of the divider.

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure
  *dividerIntValue | pointer to return integer divider value
  *dividerFracValue | pointer to return fractional divider value

Returns
  None. Loads pointed-to variables.

Note
  This API is deprecated, use Cy_SysClk_PeriPclkGetFracDivider.

Function Usage
  /* Scenario: 16-bit fractional peripheral divider #0 needs to increment its
  fractional value by 2. */
  uint32_t divIntVal, divFracVal;
  Cy_SysClk_PeriphGetFracDivider(CY_SYSCLK_DIV_16_5_BIT, 0UL, &divIntVal, &divFracVal);
  (void)Cy_SysClk_PeriphSetFracDivider(CY_SYSCLK_DIV_16_5_BIT, 0UL, divIntVal, divFracVal + 2UL);

## ◆ Cy_SysClk_PeriphAssignDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriphAssignDivider | ( | en_clk_dst_t | ipBlock,
|  | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Assigns a programmable divider to a selected IP block, such as a TCPWM or SCB.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.
  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure

Returns
  cy_en_sysclk_status_t

Note
  This API is deprecated, use Cy_SysClk_PeriPclkAssignDivider.

Function Usage
  /* Scenario: The source of TCPWM0 CNT0 clock needs to be known. If this
  source is not 16-bit divider #3, update it to be sourced from
  that clock divider and set the divider value to 2000. */
  uint32_t currDiv = Cy_SysClk_PeriphGetAssignedDivider(PCLK_TCPWM0_CLOCKS0);
  uint32_t newDiv = _VAL2FLD(PERI_DIV_CMD_TYPE_SEL, CY_SYSCLK_DIV_16_BIT)
  | _VAL2FLD(PERI_DIV_CMD_DIV_SEL, 3UL);
  if(currDiv != newDiv)
  {
  /* Assign 16-bit divider #3 to source TCPWM0 CNT0 clock */
  (void)Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS0, CY_SYSCLK_DIV_16_BIT, 3UL);
  }
  /* Set the 16-bit divider #3 value to 2000 (1999 + 1) */
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 3UL, 1999UL);
  /* Enable the 16-bit divider #3 */
  (void)Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 3UL);
  Cy_SysClk_PeriphGetAssignedDivider
  uint32_t Cy_SysClk_PeriphGetAssignedDivider(en_clk_dst_t ipBlock)
  Reports which clock divider is assigned to a selected IP block.
  Definition: cy_sysclk_v2.c:2182

## ◆ Cy_SysClk_PeriphGetAssignedDivider()

uint32_t Cy_SysClk_PeriphGetAssignedDivider | ( | en_clk_dst_t | ipBlock | ) |

Reports which clock divider is assigned to a selected IP block.

Parameters

  ipBlock | specifies ip block to connect the clock divider to.

Returns
  The divider type and number

Note
  This API is deprecated, use Cy_SysClk_PeriPclkGetAssignedDivider.

Function Usage
  /* Scenario: The source of TCPWM0 CNT0 clock needs to be known. If this
  source is not 16-bit divider #3, update it to be sourced from
  that clock divider and set the divider value to 2000. */
  uint32_t currDiv = Cy_SysClk_PeriphGetAssignedDivider(PCLK_TCPWM0_CLOCKS0);
  uint32_t newDiv = _VAL2FLD(PERI_DIV_CMD_TYPE_SEL, CY_SYSCLK_DIV_16_BIT)
  | _VAL2FLD(PERI_DIV_CMD_DIV_SEL, 3UL);
  if(currDiv != newDiv)
  {
  /* Assign 16-bit divider #3 to source TCPWM0 CNT0 clock */
  (void)Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS0, CY_SYSCLK_DIV_16_BIT, 3UL);
  }
  /* Set the 16-bit divider #3 value to 2000 (1999 + 1) */
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 3UL, 1999UL);
  /* Enable the 16-bit divider #3 */
  (void)Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 3UL);

## ◆ Cy_SysClk_PeriphEnableDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriphEnableDivider | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Enables the selected divider.

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure

Note
  This function also sets the phase alignment bits such that the enabled divider is aligned to clk_peri. See Cy_SysClk_PeriphDisableDivider() for information on how to phase-align a divider after it is enabled.
  This API is deprecated , use Cy_SysClk_PeriPclkEnableDivider.

Function Usage
  /* Scenario: TCPWM0 CNT0 clock needs to be sourced from 8-bit divider #1 with
  a value of 140. This clock must be aligned to Peri clock. */
  /* Assign 8-bit divider #1 to source TCPWM0 CNT0 clock */
  (void)Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS0, CY_SYSCLK_DIV_8_BIT, 1UL);
  /* Set the 8-bit divider #1 value to 140 (139 + 1) */
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 1UL, 139UL);
  /* Enable the 8-bit divider #1 */
  (void)Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 1UL);

## ◆ Cy_SysClk_PeriphDisableDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriphDisableDivider | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Disables a selected divider.

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t.
  dividerNum | specifies which divider of the selected type to configure.

Note
  This API is deprecated, use Cy_SysClk_PeriPclkDisableDivider.

Function Usage
  /* Scenario: 8-bit divider #1 is no longer needed and can be disabled. */
  (void)Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_8_BIT, 1UL);
  Cy_SysClk_PeriphDisableDivider
  cy_en_sysclk_status_t Cy_SysClk_PeriphDisableDivider(cy_en_divider_types_t dividerType, uint32_t dividerNum)
  Disables a selected divider.
  Definition: cy_sysclk_v2.c:2197

## ◆ Cy_SysClk_PeriphEnablePhaseAlignDivider()

cy_en_sysclk_status_t Cy_SysClk_PeriphEnablePhaseAlignDivider | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum,
|  | cy_en_divider_types_t | dividerTypePA,
|  | uint32_t | dividerNumPA
| ) |  |

First disables a selected divider (Cy_SysClk_PeriphDisableDivider), then aligns that divider to another programmable divider, and enables the selected divider.

The divider to align to must already be enabled in order to align a divider to it.

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t.
  dividerNum | specifies which divider of the selected type to configure.
  dividerTypePA | type of divider to phase-align to; cy_en_divider_types_t.
  dividerNumPA | divider number of type specified to phase align to.

Note
  To phase-align a divider to clk_peri, set dividerTypePA to 3 and dividerNumPA to 63.
  This API is deprecated, use Cy_SysClk_PeriPclkEnablePhaseAlignDivider.

Function Usage
  /* Scenario: 8-bit divider #1 needs to be aligned to 16-bit divider #0. */
  /* Set the 8-bit divider #1 value to 125 (124 + 1) */
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 1UL, 124UL);
  (void)Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 1UL);
  /* Set the 16-bit divider #0 value to 2000 (1999 + 1) */
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 0UL, 1999UL);
  (void)Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 0UL);
  /* Align the 8-bit divider #1 to the 16-bit divider #0 */
  (void)Cy_SysClk_PeriphEnablePhaseAlignDivider(CY_SYSCLK_DIV_8_BIT, 1UL, CY_SYSCLK_DIV_16_BIT, 0UL);
  Cy_SysClk_PeriphEnablePhaseAlignDivider
  cy_en_sysclk_status_t Cy_SysClk_PeriphEnablePhaseAlignDivider(cy_en_divider_types_t dividerType, uint32_t dividerNum, cy_en_divider_types_t dividerTypePA, uint32_t dividerNumPA)
  First disables a selected divider (Cy_SysClk_PeriphDisableDivider), then aligns that divider to anoth...
  Definition: cy_sysclk_v2.c:2205

## ◆ Cy_SysClk_PeriphGetDividerEnabled()

bool Cy_SysClk_PeriphGetDividerEnabled | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Reports the enabled/disabled state of the selected divider.

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t.
  dividerNum | specifies which divider of the selected type to configure.

Returns
  The enabled/disabled state;
  false = disabled
  true = enabled

Note
  This API is deprecated, use Cy_SysClk_PeriPclkGetDividerEnabled.

Function Usage
  /* Scenario: Check if the 16-bit divider #0 is enabled. If it is not, then
  enable the divider. */
  if(true == Cy_SysClk_PeriphGetDividerEnabled(CY_SYSCLK_DIV_16_BIT, 0UL))
  {
  (void)Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 0UL);
  }
  Cy_SysClk_PeriphGetDividerEnabled
  bool Cy_SysClk_PeriphGetDividerEnabled(cy_en_divider_types_t dividerType, uint32_t dividerNum)
  Reports the enabled/disabled state of the selected divider.
  Definition: cy_sysclk_v2.c:2213

## ◆ Cy_SysClk_PeriphGetFrequency()

uint32_t Cy_SysClk_PeriphGetFrequency | ( | cy_en_divider_types_t | dividerType,
|  | uint32_t | dividerNum
| ) |  |

Reports the frequency of the output of a given peripheral divider.

Parameters

  dividerType | specifies which type of divider to use; cy_en_divider_types_t
  dividerNum | specifies which divider of the selected type to configure

Returns
  The frequency, in Hz.

Note
  The reported frequency may be zero, which indicates unknown. This happens if the source input is dsi_out or clk_altlf.
  This API is deprecated, use Cy_SysClk_PeriPclkGetFrequency.

Function Usage
  /* Scenario: SCB0 needs to be clocked at PeriClk/3. Need to confirm that the
  set frequency on the chosen peripheral divider is correct.
  HFCLK0 and the clocks leading up it are configured. */
  /* Set the Peri clock divider to 2 (1 + 1) */
  Cy_SysClk_ClkPeriSetDivider(1U);
  /* Assign 8-bit divider #0 to source SCB0 clock */
  (void)Cy_SysClk_PeriphAssignDivider(PCLK_SCB0_CLOCK, CY_SYSCLK_DIV_8_BIT, 0UL);
  /* Set the 8-bit divider #0 value to 3 (2 + 1) */
  (void)Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 0UL, 2UL);
  /* Enable the 8-bit divider #0 */
  (void)Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 0UL);
  /* Calculate the frequency seen at the output of 8-bit divider #0 */
  uint32_t scbFreq = Cy_SysClk_PeriphGetFrequency(CY_SYSCLK_DIV_8_BIT, 0UL);
  if(scbFreq == 0UL)
  {
  /* Could not calculate the frequency. Check that the clock source
  is correct and/or verify by enabling the SCB0. */
  }
  else
  {
  /* Check that the frequency is as expected. */
  }