PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Data Fields
DW_Type Struct Reference

## Description

DW-0/1 (DW)

## Data Fields
__IOM uint32_t | CTL
__IM uint32_t | STATUS
__IM uint32_t | RESERVED [6]
__IM uint32_t | ACT_DESCR_CTL
__IM uint32_t | ACT_DESCR_SRC
__IM uint32_t | ACT_DESCR_DST
__IM uint32_t | RESERVED1
__IM uint32_t | ACT_DESCR_X_CTL
__IM uint32_t | ACT_DESCR_Y_CTL
__IM uint32_t | ACT_DESCR_NEXT_PTR
__IM uint32_t | RESERVED2
__IM uint32_t | ACT_SRC
__IM uint32_t | ACT_DST
__IM uint32_t | RESERVED3 [14]
__IOM uint32_t | ECC_CTL
__IM uint32_t | RESERVED4 [31]
__IOM uint32_t | CRC_CTL
__IM uint32_t | RESERVED5 [3]
__IOM uint32_t | CRC_DATA_CTL
__IM uint32_t | RESERVED6 [3]
__IOM uint32_t | CRC_POL_CTL
__IM uint32_t | RESERVED7 [3]
__IOM uint32_t | CRC_LFSR_CTL
__IM uint32_t | RESERVED8 [3]
__IOM uint32_t | CRC_REM_CTL
__IM uint32_t | RESERVED9
__IM uint32_t | CRC_REM_RESULT
__IM uint32_t | RESERVED10 [8109]
DW_CH_STRUCT_Type | CH_STRUCT [512]

## Field Documentation

## ◆ CTL

__IOM uint32_t DW_Type::CTL

0x00000000 Control

## ◆ STATUS

__IM uint32_t DW_Type::STATUS

0x00000004 Status

## ◆ RESERVED

__IM uint32_t DW_Type::RESERVED[6]

## ◆ ACT_DESCR_CTL

__IM uint32_t DW_Type::ACT_DESCR_CTL

0x00000020 Active descriptor control

## ◆ ACT_DESCR_SRC

__IM uint32_t DW_Type::ACT_DESCR_SRC

0x00000024 Active descriptor source

## ◆ ACT_DESCR_DST

__IM uint32_t DW_Type::ACT_DESCR_DST

0x00000028 Active descriptor destination

## ◆ RESERVED1

__IM uint32_t DW_Type::RESERVED1

## ◆ ACT_DESCR_X_CTL

__IM uint32_t DW_Type::ACT_DESCR_X_CTL

0x00000030 Active descriptor X loop control

## ◆ ACT_DESCR_Y_CTL

__IM uint32_t DW_Type::ACT_DESCR_Y_CTL

0x00000034 Active descriptor Y loop control

## ◆ ACT_DESCR_NEXT_PTR

__IM uint32_t DW_Type::ACT_DESCR_NEXT_PTR

0x00000038 Active descriptor next pointer

## ◆ RESERVED2

__IM uint32_t DW_Type::RESERVED2

## ◆ ACT_SRC

__IM uint32_t DW_Type::ACT_SRC

0x00000040 Active source

## ◆ ACT_DST

__IM uint32_t DW_Type::ACT_DST

0x00000044 Active destination

## ◆ RESERVED3

__IM uint32_t DW_Type::RESERVED3[14]

## ◆ ECC_CTL

__IOM uint32_t DW_Type::ECC_CTL

0x00000080 ECC control

## ◆ RESERVED4

__IM uint32_t DW_Type::RESERVED4[31]

## ◆ CRC_CTL

__IOM uint32_t DW_Type::CRC_CTL

0x00000100 CRC control

## ◆ RESERVED5

__IM uint32_t DW_Type::RESERVED5[3]

## ◆ CRC_DATA_CTL

__IOM uint32_t DW_Type::CRC_DATA_CTL

0x00000110 CRC data control

## ◆ RESERVED6

__IM uint32_t DW_Type::RESERVED6[3]

## ◆ CRC_POL_CTL

__IOM uint32_t DW_Type::CRC_POL_CTL

0x00000120 CRC polynomial control

## ◆ RESERVED7

__IM uint32_t DW_Type::RESERVED7[3]

## ◆ CRC_LFSR_CTL

__IOM uint32_t DW_Type::CRC_LFSR_CTL

0x00000130 CRC LFSR control

## ◆ RESERVED8

__IM uint32_t DW_Type::RESERVED8[3]

## ◆ CRC_REM_CTL

__IOM uint32_t DW_Type::CRC_REM_CTL

0x00000140 CRC remainder control

## ◆ RESERVED9

__IM uint32_t DW_Type::RESERVED9

## ◆ CRC_REM_RESULT

__IM uint32_t DW_Type::CRC_REM_RESULT

0x00000148 CRC remainder result

## ◆ RESERVED10

__IM uint32_t DW_Type::RESERVED10[8109]

## ◆ CH_STRUCT

DW_CH_STRUCT_Type DW_Type::CH_STRUCT[512]

0x00008000 DW channel structure