PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Data Structures | Enumerations
Data Structures
PDL API Reference » TCPWM (Timer Counter PWM) » PWM (TCPWM)

## General Description

## Data Structures
struct | cy_stc_tcpwm_pwm_config_t
| PWM configuration structure. More...

## Enumerations
enum | cy_en_tcpwm_dithering_t { CY_TCPWM_DITHERING_DISABLE = 0UL , CY_TCPWM_DITHERING_PERIOD = 1UL , CY_TCPWM_DITHERING_DUTY = 2UL , CY_TCPWM_DITHERING_PERIOD_DUTY = 3UL }
| TCPWM Dithering More...
enum | cy_en_dithering_limiter_t { CY_TCPWM_DITHERING_LIMITER_1 = 1UL , CY_TCPWM_DITHERING_LIMITER_2 = 2UL , CY_TCPWM_DITHERING_LIMITER_3 = 3UL , CY_TCPWM_DITHERING_LIMITER_4 = 4UL , CY_TCPWM_DITHERING_LIMITER_5 = 5UL , CY_TCPWM_DITHERING_LIMITER_6 = 6UL , CY_TCPWM_DITHERING_LIMITER_7 = 7UL }
| TCPWM dithering limiter values. More...
enum | cy_en_hrpwm_operating_frequency_t { CY_TCPWM_HRPWM_FREQ_80MHZ_OR_100MHZ = 0UL , CY_TCPWM_HRPWM_FREQ_160MHZ_OR_180MHZ = 1UL , CY_TCPWM_HRPWM_FREQ_200MHZ_OR_240MHZ = 2UL }
| HRPWM Operation Frequency Selects the frequency of operation of HRPWM feature. More...
enum | cy_en_kill_line_polarity_t { CY_TCPWM_LINEOUT_AND_LINECMPOUT_IS_LOW = 0UL , CY_TCPWM_LINEOUT_IS_HIGH_AND_LINECMPOUT_IS_LOW = 1UL , CY_TCPWM_LINECMPOUT_IS_HIGH_LINEOUT_IS_LOW = 2UL , CY_TCPWM_LINEOUT_AND_LINECMPOUT_IS_HIGH = 3UL }
| Specifies the behavior of the PWM outputs line_out and line_out_compl_out while the TCPWM counter is disabled or stopped. More...
enum | cy_en_line_select_config_t { CY_TCPWM_OUTPUT_CONSTANT_0 = 0UL , CY_TCPWM_OUTPUT_CONSTANT_1 = 1UL , CY_TCPWM_OUTPUT_PWM_SIGNAL = 2UL , CY_TCPWM_OUTPUT_INVERTED_PWM_SIGNAL = 3UL , CY_TCPWM_OUTPUT_PORT_DEFAULT = 4UL , CY_TCPWM_OUTPUT_SOURCE_MOTIF = 5UL }
| Source for the output signal "line_out" and "line_compl_out". More...

## Data Structure Documentation

## ◆ cy_stc_tcpwm_pwm_config_t

struct cy_stc_tcpwm_pwm_config_t

Data Fields
uint32_t | pwmMode | Sets the PWM mode. See PWM modes
uint32_t | clockPrescaler | Sets the clock prescaler inside the TCPWM block. See PWM CLK Prescaler values
uint32_t | pwmAlignment | Sets the PWM alignment. See PWM Alignment
uint32_t | deadTimeClocks | The number of dead time-clocks if PWM with dead time is chosen.
uint32_t | runMode | Sets the PWM run mode. See PWM run modes
uint32_t | period0 | Sets the period0 of the pwm.
uint32_t | period1 | Sets the period1 of the pwm.
bool | enablePeriodSwap | Enables swapping of period 0 and period 1 on terminal count.
uint32_t | compare0 | Sets the value for Compare 0.
uint32_t | compare1 | Sets the value for the buffered Compare 0.
bool | enableCompareSwap | If enabled, the compare values are swapped on the terminal count.
uint32_t | interruptSources | Enables an interrupt on the terminal count, capture or compare. See Interrupt Sources
uint32_t | invertPWMOut | Inverts the PWM output. This field also defines the state of the PWM output while PWM is enabled, but not running.
uint32_t | invertPWMOutN | Inverts the PWM_n output. This field also defines the state of the PWM_n output while PWM is enabled, but not running.
uint32_t | killMode | Configures the PWM kill modes. See PWM kill modes
uint32_t | swapInputMode | Configures how the swap input behaves. See Input Modes
uint32_t | swapInput | Selects which input the swap uses. Inputs are device-specific. See TCPWM Input Selection
uint32_t | reloadInputMode | Configures how the reload input behaves. See Input Modes
uint32_t | reloadInput | Selects which input the reload uses. The inputs are device-specific. See TCPWM Input Selection
uint32_t | startInputMode | Configures how the start input behaves. See Input Modes
uint32_t | startInput | Selects which input the start uses. The inputs are device-specific. See TCPWM Input Selection
uint32_t | killInputMode | Configures how the kill input behaves. See Input Modes
uint32_t | killInput | Selects which input the kill uses. The inputs are device-specific. See TCPWM Input Selection
uint32_t | countInputMode | Configures how the count input behaves. See Input Modes
uint32_t | countInput | Selects which input the count uses. The inputs are device-specific. See TCPWM Input Selection
bool | swapOverflowUnderflow | If enabled, line output is set on underflow and cleared on overflow. This configuration is available only in center and asymmetric alignment modes.
bool | immediateKill | Specifies whether the kill event immediately deactivates the dt_line_out and dt_line_compl_out or with the next module clock.
uint32_t | tapsEnabled | In pseudo random mode sets the enabled taps.
uint32_t | compare2 | Sets the value for Compare1
uint32_t | compare3 | Sets the value for the buffered Compare1.
bool | enableCompare1Swap | If enabled, the compare1 values are swapped on the terminal count.
bool | compare0MatchUp | Enables/Disables the compare match 0 event generation when counting up in CNT_UPDN1/2 mode.
bool | compare0MatchDown | Enables/Disables the compare match 0 event generation when counting down in CNT_UPDN1/2 mode.
bool | compare1MatchUp | Enables/Disables the compare match 1 event generation when counting up in CNT_UPDN1/2 mode.
bool | compare1MatchDown | Enables/Disables the compare match 1 event generation when counting down in CNT_UPDN1/2 mode.
uint32_t | kill1InputMode | Configures how the kill 1 input behaves. See Input Modes
uint32_t | kill1Input | Selects which input the kill 1 uses. The inputs are device-specific. See TCPWM Input Selection
uint32_t | pwmOnDisable | Specifies the behavior of the PWM outputs line_out and line_compl_out while the TCPWM counter is disabled.
uint32_t | trigger0Event | Configures which internal event generates on output trigger 0.
uint32_t | trigger1Event | Configures which internal event generates on output trigger 1.
bool | reloadLineSelect | Configures how the reload line select behaves.
cy_en_line_select_config_t | line_out_sel | Output signal source for PWM line out.
cy_en_line_select_config_t | linecompl_out_sel | Output signal source for PWM line compl out.
cy_en_line_select_config_t | line_out_sel_buff | Buffer Value Output signal source for PWM line out. Can be swapped with Line out on a terminal count event.
cy_en_line_select_config_t | linecompl_out_sel_buff | Buffer Value Output signal source for PWM line compl out. Can be swapped with Linecompl out on a terminal count event.
uint16_t | deadTimeClocks_linecompl_out | The number of dead time-clocks for line compl out if PWM with dead time is chosen.
bool | buffer_swap_enable | Configures swapping mechanism between CC0 and buffered CC0, CC1 and buffered CC1, PERIOD and buffered PERIOD, DT and buffered DT
cy_en_tcpwm_dithering_t | dithering_mode | Dithering mode is group specific configuration and will be applicable if the group supports dithering.
uint8_t | period_dithering_value | Dithering value for period LFSR. Should be non zero value.
uint8_t | duty_dithering_value | Dithering value for duty LFSR. Should be non zero value.
cy_en_dithering_limiter_t | limiter | Magnitude of the pseudo-random value to be added to period/CC0/CC1 cy_en_dithering_limiter_t.
bool | hrpwm_enable | If enabled, high resolution PWM path is enabled.
cy_en_hrpwm_operating_frequency_t | hrpwm_input_freq | Frequency of operation for HRPWM.
cy_en_kill_line_polarity_t | kill_line_polarity | Outputs line_out and line_out_compl_out while the TCPWM counter is disabled or stopped.
uint32_t | deadTimeClocksBuff | Buffer value for the number of dead time-clocks if PWM with dead time is chosen. Can be swapped with Line out on a terminal count event.
uint16_t | deadTimeClocksBuff_linecompl_out | The number of dead time-clocks for line compl out if PWM with dead time is chosen.
bool | glitch_filter_enable | Enables Glitch filter for input triggers.
cy_en_gf_depth_value_t | gf_depth | Glitch filter depth value.
bool | pwm_tc_sync_kill_dt | PWM output get suppressed at next tc event after kill input is active. If deadtime is enabled, output get suppressed after the tc event + deadtime.
bool | pwm_sync_kill_dt | PWM output line_out get suppressed immediately whereas line_compl_out get suppressed after dead time when kill input is active.

## Enumeration Type Documentation

## ◆ cy_en_tcpwm_dithering_t

enum cy_en_tcpwm_dithering_t

TCPWM Dithering

Enumerator
CY_TCPWM_DITHERING_DISABLE | TCPWM dithering is disabled.
CY_TCPWM_DITHERING_PERIOD | TCPWM dithering is set to period.
CY_TCPWM_DITHERING_DUTY | TCPWM dithering is set to duty.
CY_TCPWM_DITHERING_PERIOD_DUTY | TCPWM dithering is set to period and duty.

## ◆ cy_en_dithering_limiter_t

enum cy_en_dithering_limiter_t

TCPWM dithering limiter values.

Enumerator
CY_TCPWM_DITHERING_LIMITER_1 | TCPWM dithering limiter value 1.
CY_TCPWM_DITHERING_LIMITER_2 | TCPWM dithering limiter value 2.
CY_TCPWM_DITHERING_LIMITER_3 | TCPWM dithering limiter value 3.
CY_TCPWM_DITHERING_LIMITER_4 | TCPWM dithering limiter value 4.
CY_TCPWM_DITHERING_LIMITER_5 | TCPWM dithering limiter value 5.
CY_TCPWM_DITHERING_LIMITER_6 | TCPWM dithering limiter value 6.
CY_TCPWM_DITHERING_LIMITER_7 | TCPWM dithering limiter value 7.

## ◆ cy_en_hrpwm_operating_frequency_t

enum cy_en_hrpwm_operating_frequency_t

HRPWM Operation Frequency Selects the frequency of operation of HRPWM feature.

Micro tick is adjusted based on this information. These bits specifies the frequency of CLK_OUT from TCPWM counter. CLK_OUT = CLK_PERI = CLK_HF

Enumerator
CY_TCPWM_HRPWM_FREQ_80MHZ_OR_100MHZ | HRPWM Input Frequency is 80 MHz or 100 MHz
CY_TCPWM_HRPWM_FREQ_160MHZ_OR_180MHZ | HRPWM Input Frequency is 160 MHz or 180 MHz.
CY_TCPWM_HRPWM_FREQ_200MHZ_OR_240MHZ | HRPWM Input Frequency is 200 MHz or 240 MHz

## ◆ cy_en_kill_line_polarity_t

enum cy_en_kill_line_polarity_t

Specifies the behavior of the PWM outputs line_out and line_out_compl_out while the TCPWM counter is disabled or stopped.

Enumerator
CY_TCPWM_LINEOUT_AND_LINECMPOUT_IS_LOW | Line Out and Line Compl Out is Low during the kill and counter is disabled.
CY_TCPWM_LINEOUT_IS_HIGH_AND_LINECMPOUT_IS_LOW | Line Out is High during the kill and counter is disabled.
CY_TCPWM_LINECMPOUT_IS_HIGH_LINEOUT_IS_LOW | Line Compl Out is High during the kill and counter is disabled.
CY_TCPWM_LINEOUT_AND_LINECMPOUT_IS_HIGH | Line Out and Line Compl Out is Hig during the kill and counter is disabled.

## ◆ cy_en_line_select_config_t

enum cy_en_line_select_config_t

Source for the output signal "line_out" and "line_compl_out".

Enumerator
CY_TCPWM_OUTPUT_CONSTANT_0 | Output signal is 0.
CY_TCPWM_OUTPUT_CONSTANT_1 | Output signal is 1.
CY_TCPWM_OUTPUT_PWM_SIGNAL | Output signal is PWM Signal.
CY_TCPWM_OUTPUT_INVERTED_PWM_SIGNAL | Output signal is inverted PWM Signal.
CY_TCPWM_OUTPUT_PORT_DEFAULT | Output is not driven by the TCPWM. Instead the port default level configuration applies, e.g. "Z" (high impedance).
CY_TCPWM_OUTPUT_SOURCE_MOTIF | Source for PWM signal conditioning comes from MOTIF modulation output control signals. It can be set to '0' , '1' or PWM.