PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Macros
Shift Register CLK Prescaler values
PDL API Reference » TCPWM (Timer Counter PWM) » Shift Register (TCPWM) » Macros

## General Description

Clock prescaler values.

## Macros
#define | CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_1 (0U)
| Divide by 1.
#define | CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_2 (1U)
| Divide by 2.
#define | CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_4 (2U)
| Divide by 4.
#define | CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_8 (3U)
| Divide by 8.
#define | CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_16 (4U)
| Divide by 16.
#define | CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_32 (5U)
| Divide by 32.
#define | CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_64 (6U)
| Divide by 64.
#define | CY_TCPWM_SHIFTREG_PRESCALER_DIVBY_128 (7U)
| Divide by 128.