PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

API Reference
FIFO (The buffer block to store collected data)
PDL API Reference » AUTONOMOUS ANALOG (Autonomous Analog Block)

## General Description

The FIFO subsystem is used to store the ADC data or the FIR filter results.

The FIFO buffer consists of 512 32-bit words and FIFO fullness can be signaled by means of an interrupt. The ADC measurements stored in the FIFO can be supplemented with the channel IDs.

# Static Configuration

The static configuration contains application-specific settings intended to remain static for any FIFO application. The Autonomous Controller (AC) will NOT change the static configuration during operation.

The FIFO buffer can be divided into several (maximum 8) sub-FIFOs each with independent read/write/status functionality. For configuration settings, see cy_stc_autanalog_fifo_cfg_t structure.

# Dynamic Configuration

The Dynamic Configuration is not available for the FIFO subsystem.

# Interrupts, Triggers and STT Events

A FIFO level status can be configured as an output trigger and/or as an interrupt to wake up the CPU:

- FIFO_UNDERFLOW (interrupt only) - Indicates empty conditions for the FIFO, read value ni this case is undefined;
- FIFO_OVERFLOW (interrupt only) - Indicates overflow conditions for the FIFO, hardware will not over-write the FIFO;
- FIFO_LEVEL - Indicates FIFO level event, see cy_stc_autanalog_fifo_cfg_t::level setting;

## API Reference
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