PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Functions
SIO Functions
PDL API Reference » GPIO (General Purpose Input Output) » Functions

## General Description

## Functions
__STATIC_INLINE void | Cy_GPIO_SetVregEn (GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
| Configures the SIO pin pair output buffer regulation mode. More...
__STATIC_INLINE uint32_t | Cy_GPIO_GetVregEn (GPIO_PRT_Type *base, uint32_t pinNum)
| Returns the SIO pin pair output buffer regulation mode. More...
__STATIC_INLINE void | Cy_GPIO_SetIbufMode (GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
| Configures the SIO pin pair input buffer mode. More...
__STATIC_INLINE uint32_t | Cy_GPIO_GetIbufMode (GPIO_PRT_Type *base, uint32_t pinNum)
| Returns the SIO pin pair input buffer mode. More...
__STATIC_INLINE void | Cy_GPIO_SetVtripSel (GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
| Configures the SIO pin pair input buffer trip point. More...
__STATIC_INLINE uint32_t | Cy_GPIO_GetVtripSel (GPIO_PRT_Type *base, uint32_t pinNum)
| Returns the SIO pin pair input buffer trip point. More...
__STATIC_INLINE void | Cy_GPIO_SetVrefSel (GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
| Configures the SIO reference voltage for the input buffer trip point. More...
__STATIC_INLINE uint32_t | Cy_GPIO_GetVrefSel (GPIO_PRT_Type *base, uint32_t pinNum)
| Returns the SIO reference voltage for the input buffer trip point. More...
__STATIC_INLINE void | Cy_GPIO_SetVohSel (GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
| Configures the regulated output reference multiplier for the SIO pin pair. More...
__STATIC_INLINE uint32_t | Cy_GPIO_GetVohSel (GPIO_PRT_Type *base, uint32_t pinNum)
| Returns the regulated output reference multiplier for the SIO pin pair. More...

## Function Documentation

## ◆ Cy_GPIO_SetVregEn()

__STATIC_INLINE void Cy_GPIO_SetVregEn | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum,
|  | uint32_t | value
| ) |  |

Configures the SIO pin pair output buffer regulation mode.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register
  value | SIO pair output buffer regulator mode. Options are detailed in SIO output buffer mode macros

Note
  This function modifies a port register in a read-modify-write operation. It is not thread safe as the resource is shared among multiple pins on a port.

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as output pins. The output (driven)
  signals on P0.1 and P0.0 need to be at a regulated voltage
  based on Voh and VRef selection. */
  /* Get the output buffer regulation mode of P0.1/P0.0 pair */
  if(CY_SIO_VREG_UNREGULATED == Cy_GPIO_GetVregEn(P0_0_PORT, P0_0_NUM))
  {
  /* Set the output buffer to be regulated on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVregEn(P0_0_PORT, P0_0_NUM, CY_SIO_VREG_REGULATED);
  }
  Cy_GPIO_SetVregEn
  __STATIC_INLINE void Cy_GPIO_SetVregEn(GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
  Configures the SIO pin pair output buffer regulation mode.
  Definition: cy_gpio.h:1644
  Cy_GPIO_GetVregEn
  __STATIC_INLINE uint32_t Cy_GPIO_GetVregEn(GPIO_PRT_Type *base, uint32_t pinNum)
  Returns the SIO pin pair output buffer regulation mode.
  Definition: cy_gpio.h:1676
  CY_SIO_VREG_UNREGULATED
  #define CY_SIO_VREG_UNREGULATED
  Unregulated output buffer.
  Definition: cy_gpio.h:587
  CY_SIO_VREG_REGULATED
  #define CY_SIO_VREG_REGULATED
  Regulated output buffer.
  Definition: cy_gpio.h:588

## ◆ Cy_GPIO_GetVregEn()

__STATIC_INLINE uint32_t Cy_GPIO_GetVregEn | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum
| ) |  |

Returns the SIO pin pair output buffer regulation mode.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register

Returns
  SIO pair output buffer regulator mode. Options are detailed in SIO output buffer mode macros

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as output pins. The output (driven)
  signals on P0.1 and P0.0 need to be at a regulated voltage
  based on Voh and VRef selection. */
  /* Get the output buffer regulation mode of P0.1/P0.0 pair */
  if(CY_SIO_VREG_UNREGULATED == Cy_GPIO_GetVregEn(P0_0_PORT, P0_0_NUM))
  {
  /* Set the output buffer to be regulated on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVregEn(P0_0_PORT, P0_0_NUM, CY_SIO_VREG_REGULATED);
  }

## ◆ Cy_GPIO_SetIbufMode()

__STATIC_INLINE void Cy_GPIO_SetIbufMode | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum,
|  | uint32_t | value
| ) |  |

Configures the SIO pin pair input buffer mode.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register
  value | SIO pair input buffer mode. Options are detailed in SIO input buffer mode macros

Note
  This function modifies a port register in a read-modify-write operation. It is not thread safe as the resource is shared among multiple pins on a port.

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as input pins. The input signals
  on P0.1 and P0.0 need to be interpreted as logic 0 or 1
  depending on the chosen SIO vtrip point. */
  /* Get the input buffer mode of P0.1/P0.0 pair */
  if(CY_SIO_IBUF_SINGLEENDED == Cy_GPIO_GetIbufMode(P0_0_PORT, P0_0_NUM))
  {
  /* Set the input buffer to be differential on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetIbufMode(P0_0_PORT, P0_0_NUM, CY_SIO_IBUF_DIFFERENTIAL);
  }
  Cy_GPIO_SetIbufMode
  __STATIC_INLINE void Cy_GPIO_SetIbufMode(GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
  Configures the SIO pin pair input buffer mode.
  Definition: cy_gpio.h:1714
  Cy_GPIO_GetIbufMode
  __STATIC_INLINE uint32_t Cy_GPIO_GetIbufMode(GPIO_PRT_Type *base, uint32_t pinNum)
  Returns the SIO pin pair input buffer mode.
  Definition: cy_gpio.h:1746
  CY_SIO_IBUF_SINGLEENDED
  #define CY_SIO_IBUF_SINGLEENDED
  Single ended input buffer.
  Definition: cy_gpio.h:596
  CY_SIO_IBUF_DIFFERENTIAL
  #define CY_SIO_IBUF_DIFFERENTIAL
  Differential input buffer.
  Definition: cy_gpio.h:597

## ◆ Cy_GPIO_GetIbufMode()

__STATIC_INLINE uint32_t Cy_GPIO_GetIbufMode | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum
| ) |  |

Returns the SIO pin pair input buffer mode.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register

Returns
  SIO pair input buffer mode. Options are detailed in SIO input buffer mode macros

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as input pins. The input signals
  on P0.1 and P0.0 need to be interpreted as logic 0 or 1
  depending on the chosen SIO vtrip point. */
  /* Get the input buffer mode of P0.1/P0.0 pair */
  if(CY_SIO_IBUF_SINGLEENDED == Cy_GPIO_GetIbufMode(P0_0_PORT, P0_0_NUM))
  {
  /* Set the input buffer to be differential on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetIbufMode(P0_0_PORT, P0_0_NUM, CY_SIO_IBUF_DIFFERENTIAL);
  }

## ◆ Cy_GPIO_SetVtripSel()

__STATIC_INLINE void Cy_GPIO_SetVtripSel | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum,
|  | uint32_t | value
| ) |  |

Configures the SIO pin pair input buffer trip point.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register
  value | SIO pair input buffer trip point. Options are detailed in SIO input buffer trip-point macros

Note
  This function modifies a port register in a read-modify-write operation. It is not thread safe as the resource is shared among multiple pins on a port.

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as input pins. The input signals
  on P0.1 and P0.0 need to be interpreted as logic 0 or 1 at
  0.5 x VDDIO threshold. */
  /* Set the input buffer to be differential on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetIbufMode(P0_0_PORT, P0_0_NUM, CY_SIO_IBUF_DIFFERENTIAL);
  /* Choose VREF to be sourced from VDDIO (pin ref) */
  Cy_GPIO_SetVrefSel(P0_0_PORT, P0_0_NUM, CY_SIO_VREF_PINREF);
  /* Get the input buffer trip-point of P0.1/P0.0 pair */
  if(CY_SIO_VTRIP_CMOS == Cy_GPIO_GetVtripSel(P0_0_PORT, P0_0_NUM))
  {
  /* Set the input buffer trip-point to 0.5 x VDDIO on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVtripSel(P0_0_PORT, P0_0_NUM, CY_SIO_VTRIP_0_5VDDIO_0_5VOH);
  }
  Cy_GPIO_GetVtripSel
  __STATIC_INLINE uint32_t Cy_GPIO_GetVtripSel(GPIO_PRT_Type *base, uint32_t pinNum)
  Returns the SIO pin pair input buffer trip point.
  Definition: cy_gpio.h:1817
  Cy_GPIO_SetVtripSel
  __STATIC_INLINE void Cy_GPIO_SetVtripSel(GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
  Configures the SIO pin pair input buffer trip point.
  Definition: cy_gpio.h:1784
  Cy_GPIO_SetVrefSel
  __STATIC_INLINE void Cy_GPIO_SetVrefSel(GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
  Configures the SIO reference voltage for the input buffer trip point.
  Definition: cy_gpio.h:1855
  CY_SIO_VREF_PINREF
  #define CY_SIO_VREF_PINREF
  Vref from analog pin.
  Definition: cy_gpio.h:616
  CY_SIO_VTRIP_0_5VDDIO_0_5VOH
  #define CY_SIO_VTRIP_0_5VDDIO_0_5VOH
  0.5xVddio or 0.5xVoh (differential)
  Definition: cy_gpio.h:607
  CY_SIO_VTRIP_CMOS
  #define CY_SIO_VTRIP_CMOS
  CMOS input buffer (single-ended)
  Definition: cy_gpio.h:605

## ◆ Cy_GPIO_GetVtripSel()

__STATIC_INLINE uint32_t Cy_GPIO_GetVtripSel | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum
| ) |  |

Returns the SIO pin pair input buffer trip point.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register

Returns
  SIO pair input buffer trip point. Options are detailed in SIO input buffer trip-point macros

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as input pins. The input signals
  on P0.1 and P0.0 need to be interpreted as logic 0 or 1 at
  0.5 x VDDIO threshold. */
  /* Set the input buffer to be differential on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetIbufMode(P0_0_PORT, P0_0_NUM, CY_SIO_IBUF_DIFFERENTIAL);
  /* Choose VREF to be sourced from VDDIO (pin ref) */
  Cy_GPIO_SetVrefSel(P0_0_PORT, P0_0_NUM, CY_SIO_VREF_PINREF);
  /* Get the input buffer trip-point of P0.1/P0.0 pair */
  if(CY_SIO_VTRIP_CMOS == Cy_GPIO_GetVtripSel(P0_0_PORT, P0_0_NUM))
  {
  /* Set the input buffer trip-point to 0.5 x VDDIO on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVtripSel(P0_0_PORT, P0_0_NUM, CY_SIO_VTRIP_0_5VDDIO_0_5VOH);
  }

## ◆ Cy_GPIO_SetVrefSel()

__STATIC_INLINE void Cy_GPIO_SetVrefSel | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum,
|  | uint32_t | value
| ) |  |

Configures the SIO reference voltage for the input buffer trip point.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register
  value | SIO pair reference voltage. Options are detailed in SIO reference voltage for input buffer trip-point macros

Note
  This function modifies a port register in a read-modify-write operation. It is not thread safe as the resource is shared among multiple pins on a port.

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as input pins. The input signals
  on P0.1 and P0.0 need to be interpreted as logic 0 or 1 at
  1.25 x 1.2V threshold. */
  /* Set the input buffer to be differential on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetIbufMode(P0_0_PORT, P0_0_NUM, CY_SIO_IBUF_DIFFERENTIAL);
  /* Set the input buffer trip-point to 0.5 x VOH on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVtripSel(P0_0_PORT, P0_0_NUM, CY_SIO_VTRIP_0_5VDDIO_0_5VOH);
  /* Set the regulated input buffer trip point multiplier to 1.25 x VRef */
  Cy_GPIO_SetVohSel(P0_0_PORT, P0_0_NUM, CY_SIO_VOH_1_25);
  /* Get the reference voltage of P0.1/P0.0 pair */
  if(CY_SIO_VREF_PINREF == Cy_GPIO_GetVrefSel(P0_0_PORT, P0_0_NUM))
  {
  /* Set the reference voltage to 1.2V SRSS internal reference on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVrefSel(P0_0_PORT, P0_0_NUM, CY_SIO_VREF_1_2V);
  }
  Cy_GPIO_GetVrefSel
  __STATIC_INLINE uint32_t Cy_GPIO_GetVrefSel(GPIO_PRT_Type *base, uint32_t pinNum)
  Returns the SIO reference voltage for the input buffer trip point.
  Definition: cy_gpio.h:1888
  Cy_GPIO_SetVohSel
  __STATIC_INLINE void Cy_GPIO_SetVohSel(GPIO_PRT_Type *base, uint32_t pinNum, uint32_t value)
  Configures the regulated output reference multiplier for the SIO pin pair.
  Definition: cy_gpio.h:1929
  CY_SIO_VOH_1_25
  #define CY_SIO_VOH_1_25
  Voh = 1.25 x Reference.
  Definition: cy_gpio.h:628
  CY_SIO_VREF_1_2V
  #define CY_SIO_VREF_1_2V
  Vref from internal 1.2V reference.
  Definition: cy_gpio.h:617

## ◆ Cy_GPIO_GetVrefSel()

__STATIC_INLINE uint32_t Cy_GPIO_GetVrefSel | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum
| ) |  |

Returns the SIO reference voltage for the input buffer trip point.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register

Returns
  SIO pair reference voltage. Options are detailed in SIO reference voltage for input buffer trip-point macros

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as input pins. The input signals
  on P0.1 and P0.0 need to be interpreted as logic 0 or 1 at
  1.25 x 1.2V threshold. */
  /* Set the input buffer to be differential on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetIbufMode(P0_0_PORT, P0_0_NUM, CY_SIO_IBUF_DIFFERENTIAL);
  /* Set the input buffer trip-point to 0.5 x VOH on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVtripSel(P0_0_PORT, P0_0_NUM, CY_SIO_VTRIP_0_5VDDIO_0_5VOH);
  /* Set the regulated input buffer trip point multiplier to 1.25 x VRef */
  Cy_GPIO_SetVohSel(P0_0_PORT, P0_0_NUM, CY_SIO_VOH_1_25);
  /* Get the reference voltage of P0.1/P0.0 pair */
  if(CY_SIO_VREF_PINREF == Cy_GPIO_GetVrefSel(P0_0_PORT, P0_0_NUM))
  {
  /* Set the reference voltage to 1.2V SRSS internal reference on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVrefSel(P0_0_PORT, P0_0_NUM, CY_SIO_VREF_1_2V);
  }

## ◆ Cy_GPIO_SetVohSel()

__STATIC_INLINE void Cy_GPIO_SetVohSel | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum,
|  | uint32_t | value
| ) |  |

Configures the regulated output reference multiplier for the SIO pin pair.

The regulated output reference controls both the output level of digital output pin and the input trip point of digital input pin in the SIO pair.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register
  value | SIO pair reference voltage. Options are detailed in Regulated output voltage level (Voh) and input buffer trip-point of an SIO pair macros

Note
  This function modifies a port register in a read-modify-write operation. It is not thread safe as the resource is shared among multiple pins on a port.

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as output pins. The output (driven)
  signals on P0.1 and P0.0 need to be at
  2.5 x AMuxBusA voltage x 2 for logic high. */
  /* Set the output buffer to be regulated on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVregEn(P0_0_PORT, P0_0_NUM, CY_SIO_VREG_REGULATED);
  /* Set the reference voltage to be sourced from AMUXBUS A */
  Cy_GPIO_SetVrefSel(P0_0_PORT, P0_0_NUM, CY_SIO_VREF_AMUX_A);
  /* Get the regulated voltage multiplier value of P0.1/P0.0 pair */
  if(CY_SIO_VOH_1_00 == Cy_GPIO_GetVohSel(P0_0_PORT, P0_0_NUM))
  {
  /* Set the regulated voltage multiplier to 2.5 x VRef */
  Cy_GPIO_SetVohSel(P0_0_PORT, P0_0_NUM, CY_SIO_VOH_2_50);
  }
  Cy_GPIO_GetVohSel
  __STATIC_INLINE uint32_t Cy_GPIO_GetVohSel(GPIO_PRT_Type *base, uint32_t pinNum)
  Returns the regulated output reference multiplier for the SIO pin pair.
  Definition: cy_gpio.h:1962
  CY_SIO_VOH_1_00
  #define CY_SIO_VOH_1_00
  Voh = 1 x Reference.
  Definition: cy_gpio.h:627
  CY_SIO_VOH_2_50
  #define CY_SIO_VOH_2_50
  Voh = 2.50 x Reference.
  Definition: cy_gpio.h:632
  CY_SIO_VREF_AMUX_A
  #define CY_SIO_VREF_AMUX_A
  Vref from AMUXBUS_A.
  Definition: cy_gpio.h:618

## ◆ Cy_GPIO_GetVohSel()

__STATIC_INLINE uint32_t Cy_GPIO_GetVohSel | ( | GPIO_PRT_Type * | base,
|  | uint32_t | pinNum
| ) |  |

Returns the regulated output reference multiplier for the SIO pin pair.

Note that this function has no effect on non-SIO pins.

Parameters

  base | Pointer to the pin's port register base address
  pinNum | Position of the pin bit-field within the port register

Returns
  SIO pair reference voltage. Options are detailed in Regulated output voltage level (Voh) and input buffer trip-point of an SIO pair macros

Function Usage
  /* Scenario: Assume P0.0 is an SIO pin and that it is paired with P0.1.
  Both pins are configured as output pins. The output (driven)
  signals on P0.1 and P0.0 need to be at
  2.5 x AMuxBusA voltage x 2 for logic high. */
  /* Set the output buffer to be regulated on the P0.1/P0.0 SIO pair */
  Cy_GPIO_SetVregEn(P0_0_PORT, P0_0_NUM, CY_SIO_VREG_REGULATED);
  /* Set the reference voltage to be sourced from AMUXBUS A */
  Cy_GPIO_SetVrefSel(P0_0_PORT, P0_0_NUM, CY_SIO_VREF_AMUX_A);
  /* Get the regulated voltage multiplier value of P0.1/P0.0 pair */
  if(CY_SIO_VOH_1_00 == Cy_GPIO_GetVohSel(P0_0_PORT, P0_0_NUM))
  {
  /* Set the regulated voltage multiplier to 2.5 x VRef */
  Cy_GPIO_SetVohSel(P0_0_PORT, P0_0_NUM, CY_SIO_VOH_2_50);
  }