PSOC E8XXGP Device Support Library

| PSOC E8XXGP Device Support Library

Data Fields
CANFD_CH_M_TTCAN_Type Struct Reference

## Description

TTCAN 3PIP, includes FD (CANFD_CH_M_TTCAN)

## Data Fields
__IM uint32_t | CREL
__IM uint32_t | ENDN
__IM uint32_t | RESERVED
__IOM uint32_t | DBTP
__IOM uint32_t | TEST
__IOM uint32_t | RWD
__IOM uint32_t | CCCR
__IOM uint32_t | NBTP
__IOM uint32_t | TSCC
__IOM uint32_t | TSCV
__IOM uint32_t | TOCC
__IOM uint32_t | TOCV
__IM uint32_t | RESERVED1 [4]
__IM uint32_t | ECR
__IM uint32_t | PSR
__IOM uint32_t | TDCR
__IM uint32_t | RESERVED2
__IOM uint32_t | IR
__IOM uint32_t | IE
__IOM uint32_t | ILS
__IOM uint32_t | ILE
__IM uint32_t | RESERVED3 [8]
__IOM uint32_t | GFC
__IOM uint32_t | SIDFC
__IOM uint32_t | XIDFC
__IM uint32_t | RESERVED4
__IOM uint32_t | XIDAM
__IM uint32_t | HPMS
__IOM uint32_t | NDAT1
__IOM uint32_t | NDAT2
__IOM uint32_t | RXF0C
__IM uint32_t | RXF0S
__IOM uint32_t | RXF0A
__IOM uint32_t | RXBC
__IOM uint32_t | RXF1C
__IM uint32_t | RXF1S
__IOM uint32_t | RXF1A
__IOM uint32_t | RXESC
__IOM uint32_t | TXBC
__IM uint32_t | TXFQS
__IOM uint32_t | TXESC
__IM uint32_t | TXBRP
__IOM uint32_t | TXBAR
__IOM uint32_t | TXBCR
__IM uint32_t | TXBTO
__IM uint32_t | TXBCF
__IOM uint32_t | TXBTIE
__IOM uint32_t | TXBCIE
__IM uint32_t | RESERVED5 [2]
__IOM uint32_t | TXEFC
__IM uint32_t | TXEFS
__IOM uint32_t | TXEFA
__IM uint32_t | RESERVED6
__IOM uint32_t | TTTMC
__IOM uint32_t | TTRMC
__IOM uint32_t | TTOCF
__IOM uint32_t | TTMLM
__IOM uint32_t | TURCF
__IOM uint32_t | TTOCN
__IOM uint32_t | TTGTP
__IOM uint32_t | TTTMK
__IOM uint32_t | TTIR
__IOM uint32_t | TTIE
__IOM uint32_t | TTILS
__IM uint32_t | TTOST
__IM uint32_t | TURNA
__IM uint32_t | TTLGT
__IM uint32_t | TTCTC
__IM uint32_t | TTCPT
__IM uint32_t | TTCSM
__IM uint32_t | RESERVED7 [15]

## Field Documentation

## ◆ CREL

__IM uint32_t CANFD_CH_M_TTCAN_Type::CREL

0x00000000 Core Release Register

## ◆ ENDN

__IM uint32_t CANFD_CH_M_TTCAN_Type::ENDN

0x00000004 Endian Register

## ◆ RESERVED

__IM uint32_t CANFD_CH_M_TTCAN_Type::RESERVED

## ◆ DBTP

__IOM uint32_t CANFD_CH_M_TTCAN_Type::DBTP

0x0000000C Data Bit Timing & Prescaler Register

## ◆ TEST

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TEST

0x00000010 Test Register

## ◆ RWD

__IOM uint32_t CANFD_CH_M_TTCAN_Type::RWD

0x00000014 RAM Watchdog

## ◆ CCCR

__IOM uint32_t CANFD_CH_M_TTCAN_Type::CCCR

0x00000018 CC Control Register

## ◆ NBTP

__IOM uint32_t CANFD_CH_M_TTCAN_Type::NBTP

0x0000001C Nominal Bit Timing & Prescaler Register

## ◆ TSCC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TSCC

0x00000020 Timestamp Counter Configuration

## ◆ TSCV

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TSCV

0x00000024 Timestamp Counter Value

## ◆ TOCC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TOCC

0x00000028 Timeout Counter Configuration

## ◆ TOCV

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TOCV

0x0000002C Timeout Counter Value

## ◆ RESERVED1

__IM uint32_t CANFD_CH_M_TTCAN_Type::RESERVED1[4]

## ◆ ECR

__IM uint32_t CANFD_CH_M_TTCAN_Type::ECR

0x00000040 Error Counter Register

## ◆ PSR

__IM uint32_t CANFD_CH_M_TTCAN_Type::PSR

0x00000044 Protocol Status Register

## ◆ TDCR

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TDCR

0x00000048 Transmitter Delay Compensation Register

## ◆ RESERVED2

__IM uint32_t CANFD_CH_M_TTCAN_Type::RESERVED2

## ◆ IR

__IOM uint32_t CANFD_CH_M_TTCAN_Type::IR

0x00000050 Interrupt Register

## ◆ IE

__IOM uint32_t CANFD_CH_M_TTCAN_Type::IE

0x00000054 Interrupt Enable

## ◆ ILS

__IOM uint32_t CANFD_CH_M_TTCAN_Type::ILS

0x00000058 Interrupt Line Select

## ◆ ILE

__IOM uint32_t CANFD_CH_M_TTCAN_Type::ILE

0x0000005C Interrupt Line Enable

## ◆ RESERVED3

__IM uint32_t CANFD_CH_M_TTCAN_Type::RESERVED3[8]

## ◆ GFC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::GFC

0x00000080 Global Filter Configuration

## ◆ SIDFC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::SIDFC

0x00000084 Standard ID Filter Configuration

## ◆ XIDFC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::XIDFC

0x00000088 Extended ID Filter Configuration

## ◆ RESERVED4

__IM uint32_t CANFD_CH_M_TTCAN_Type::RESERVED4

## ◆ XIDAM

__IOM uint32_t CANFD_CH_M_TTCAN_Type::XIDAM

0x00000090 Extended ID AND Mask

## ◆ HPMS

__IM uint32_t CANFD_CH_M_TTCAN_Type::HPMS

0x00000094 High Priority Message Status

## ◆ NDAT1

__IOM uint32_t CANFD_CH_M_TTCAN_Type::NDAT1

0x00000098 New Data 1

## ◆ NDAT2

__IOM uint32_t CANFD_CH_M_TTCAN_Type::NDAT2

0x0000009C New Data 2

## ◆ RXF0C

__IOM uint32_t CANFD_CH_M_TTCAN_Type::RXF0C

0x000000A0 Rx FIFO 0 Configuration

## ◆ RXF0S

__IM uint32_t CANFD_CH_M_TTCAN_Type::RXF0S

0x000000A4 Rx FIFO 0 Status

## ◆ RXF0A

__IOM uint32_t CANFD_CH_M_TTCAN_Type::RXF0A

0x000000A8 Rx FIFO 0 Acknowledge

## ◆ RXBC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::RXBC

0x000000AC Rx Buffer Configuration

## ◆ RXF1C

__IOM uint32_t CANFD_CH_M_TTCAN_Type::RXF1C

0x000000B0 Rx FIFO 1 Configuration

## ◆ RXF1S

__IM uint32_t CANFD_CH_M_TTCAN_Type::RXF1S

0x000000B4 Rx FIFO 1 Status

## ◆ RXF1A

__IOM uint32_t CANFD_CH_M_TTCAN_Type::RXF1A

0x000000B8 Rx FIFO 1 Acknowledge

## ◆ RXESC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::RXESC

0x000000BC Rx Buffer / FIFO Element Size Configuration

## ◆ TXBC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TXBC

0x000000C0 Tx Buffer Configuration

## ◆ TXFQS

__IM uint32_t CANFD_CH_M_TTCAN_Type::TXFQS

0x000000C4 Tx FIFO/Queue Status

## ◆ TXESC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TXESC

0x000000C8 Tx Buffer Element Size Configuration

## ◆ TXBRP

__IM uint32_t CANFD_CH_M_TTCAN_Type::TXBRP

0x000000CC Tx Buffer Request Pending

## ◆ TXBAR

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TXBAR

0x000000D0 Tx Buffer Add Request

## ◆ TXBCR

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TXBCR

0x000000D4 Tx Buffer Cancellation Request

## ◆ TXBTO

__IM uint32_t CANFD_CH_M_TTCAN_Type::TXBTO

0x000000D8 Tx Buffer Transmission Occurred

## ◆ TXBCF

__IM uint32_t CANFD_CH_M_TTCAN_Type::TXBCF

0x000000DC Tx Buffer Cancellation Finished

## ◆ TXBTIE

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TXBTIE

0x000000E0 Tx Buffer Transmission Interrupt Enable

## ◆ TXBCIE

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TXBCIE

0x000000E4 Tx Buffer Cancellation Finished Interrupt Enable

## ◆ RESERVED5

__IM uint32_t CANFD_CH_M_TTCAN_Type::RESERVED5[2]

## ◆ TXEFC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TXEFC

0x000000F0 Tx Event FIFO Configuration

## ◆ TXEFS

__IM uint32_t CANFD_CH_M_TTCAN_Type::TXEFS

0x000000F4 Tx Event FIFO Status

## ◆ TXEFA

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TXEFA

0x000000F8 Tx Event FIFO Acknowledge

## ◆ RESERVED6

__IM uint32_t CANFD_CH_M_TTCAN_Type::RESERVED6

## ◆ TTTMC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTTMC

0x00000100 TT Trigger Memory Configuration

## ◆ TTRMC

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTRMC

0x00000104 TT Reference Message Configuration

## ◆ TTOCF

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTOCF

0x00000108 TT Operation Configuration

## ◆ TTMLM

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTMLM

0x0000010C TT Matrix Limits

## ◆ TURCF

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TURCF

0x00000110 TUR Configuration

## ◆ TTOCN

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTOCN

0x00000114 TT Operation Control

## ◆ TTGTP

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTGTP

0x00000118 TT Global Time Preset

## ◆ TTTMK

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTTMK

0x0000011C TT Time Mark

## ◆ TTIR

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTIR

0x00000120 TT Interrupt Register

## ◆ TTIE

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTIE

0x00000124 TT Interrupt Enable

## ◆ TTILS

__IOM uint32_t CANFD_CH_M_TTCAN_Type::TTILS

0x00000128 TT Interrupt Line Select

## ◆ TTOST

__IM uint32_t CANFD_CH_M_TTCAN_Type::TTOST

0x0000012C TT Operation Status

## ◆ TURNA

__IM uint32_t CANFD_CH_M_TTCAN_Type::TURNA

0x00000130 TUR Numerator Actual

## ◆ TTLGT

__IM uint32_t CANFD_CH_M_TTCAN_Type::TTLGT

0x00000134 TT Local & Global Time

## ◆ TTCTC

__IM uint32_t CANFD_CH_M_TTCAN_Type::TTCTC

0x00000138 TT Cycle Time & Count

## ◆ TTCPT

__IM uint32_t CANFD_CH_M_TTCAN_Type::TTCPT

0x0000013C TT Capture Time

## ◆ TTCSM

__IM uint32_t CANFD_CH_M_TTCAN_Type::TTCSM

0x00000140 TT Cycle Sync Mark

## ◆ RESERVED7

__IM uint32_t CANFD_CH_M_TTCAN_Type::RESERVED7[15]